ESE 566A: Modern System-on-Chip Design

Course Administrivia

Course:
      ESE 566A, Spring 2017, 3 Units

Instructional Staff:
     Xuan Zhang (Instructor)
     Yunfei Gu (TA)
     Dengxue Yan (TA)

Homepage:
     http://classes.engineering.wustl.edu/ese566/

Discussion Board:
We will be using Piazza for discussion purposes. Please ask any questions in the Q&A section so that all students may see the question/answer.

      Piazza

Lecture:
     Lab Sciences 301, Mo We: 2:30 PM - 4:00 PM

Office Hours:
      Green Hall 2160F,   Mo: 4:00 PM - 5:00 PM   (Xuan Zhang)
      Green Hall 2160F,   Tu: 3:30 PM - 5:00 PM   (Yunfei Gu)
      Green Hall 2160F,   Th: 3:30 PM - 5:00 PM   (Dengxue Yan)

Course Description

Modern System-on-Chip (SoC) design is the art of integrating billions of transistors on to a single silicon chip, containing various components such as microprocessors, DSPs, hardware accelerators, memories, and I/O interfaces, that powers today's cutting-edge electronic systems -- smart phones, wearable devices, autonomous robots, and automotive, aerospace or medical electronics.d 

This course covers system-on-chip architectures, design tools and methods, and delves into the complexity of system design, including tradeoffs between performance, power consumption, energy efficiency, reliability, and programmability. It presents students with an insight into the early stage of the SoC design process, when design teams need to perform the tasks of develop functional specification, partition and map functions onto hardware and/or software, and evaluate and validate system performance. 

Schedule (Tentative)

Lecture Date Week Topics Note
1 Jan 18 1(b) Introduction to SoC and System Stack   (PDF) HW #1 is released
2 Jan 23 2(a) CMOS Devices   (PDF)
3 Jan 25 2(b) CMOS Circuits (Part 1)   (PDF) HW #2 is released
(EQ reference list)
4 Jan 30 3(a) CMOS Circuits (Part 2)
5 Feb 1 3(b) CMOS Circuits (Part 3)   (PDF) HW #3 is released
6 Feb 6 4(a) In-Class Exam;
7 Feb 8 4(b) Tool Tutorials (A) (B) Lab #1 is released
8 Feb 13 5(a) Sequential Circuits and Memory   (PDF)
9 Feb 15 5(b) Overview of Design Flow   (PDF)
10 Feb 20 6(a) Computer Architecture Perspective   (PDF)
11 Feb 22 6(b) Fundamental Processor Concepts   (PDF) Lab #2 is released
12 Feb 27 7(a) Processor Microarchitecture (Part 1)   (PDF)
13 Mar 1 7(b) Processor Microarchitecture (Part 2)   (PDF)
14 Mar 6 8(a) Processor Microarchitecture (Part 3)   (PDF)
15 Mar 8 8(b) Fundamental Memory Concepts (Part 1)   (PDF) Lab #3 is released
16 Mar 13 9(a) Spring Break
17 Mar 15 9(b)
18 Mar 20 10(a) Fundamental Memory Concepts (Part 2)   (PDF)
19 Mar 22 10(b) Process and Memory Integration   (PDF)
20 Mar 27 11(a) Class Project Introduction and Case Study: DianNao (Part 1)   (PDF)   Class Project
is released
21 Mar 29 11(b) Case Study: DianNao (Part 2)   (PDF)
22 Apr 3 12(a) Case Study: Eyeriss (Part 1)   (PDF)
23 Apr 5 12(b) Case Study: Eyeriss (Part 2)   (PDF)
24 Apr 10 13(a) Group meeting
25 Apr 12 13(b) Guideline for Presentation and Report   (PDF)
26 Apr 17 14(a) Group Meeting (Part 1)
27 Apr 19 14(b) Group Meeting (Part 2)
28 Apr 24 15(a) Class Project Presentation (Part 1)
29 Apr 26 15(b) Class Project Presentation (Part 2)
Conclusion and Parting Messages   (PDF)

Prerequisites

The curricular prequisites for this class include ESE 232 (Introduction to Electronic Circuits), ESE 260 (Introduction to Digital Logic and Computer Design), and experience with register-transfer level (RTL) design and hardware description language (e.g. verilog, VHDL), or permission from the instructors.

Although not required, familiarity with the subjects in the following courses are a plus: ESE 362 (Computer Architecture). ESE 461 (Design Automation for Integrated Circuit Systems), CSE/ESE 462M (Computer System Design)

In general, students are expected to have a firm grasp on digital and analog circuits, be familiar with embedded system programming, and know their way around the Linux system. In addition, success in this course will require substantial reading and hacking, and a high degree of patience and determination.

Grading

In-Class Exam 10%
Homework Sets 20%
Lab Assignments 30%
Class Project 35%
Class Engagement 5%

Policy

90% or above A
80% - 89% B
65% - 79% C
45% - 64% D
44% or below F

Resources

  1. Tutorial on Remote Logging to Linux Lab and how to use Linux
  2. Tutorial on Synopsys VCS
  3. Tutorial on Synopsys Design Compiler
  4. Tutorial on Cadence Encounter

 

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