LECTURE
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DATE
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TOPICS
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PREPARATION
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ASSIGNED
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DUE
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1
|
AUG 28
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Course Introduction Classification of Computers and Instructions Addressing Modes
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Course Introduction Chapter 1 Chapter 2
|
Homework 1
|
|
2
|
AUG 30
|
RISC vs. CISC The Really Simple RISC Computer (RSRC) SRC/RSRC Assembly Language
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Chapter 2 The Case for the RISC David Patterson David Ditzel The Really Simple RISC Computer The SRC/RSRC Instruction Set
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|
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3
|
SEPT 4
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RSRC VHDL/FPGA Implementation
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VHDL Tutorial RSRC Vivado Tutorial Xilinx Vivado Clock Constraints Tutorial
|
Homework 2
|
Homework 1
|
4
|
SEPT 6
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Introduction to Memory Address Decoding Xilinx IP Cores →Xilinx FPGA Block RAM →Xilinx Digital Clock Manager (DCM)
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Chapter 7 AM27C256 EPROM Datasheet EPROM Example CY7C199N SRAM Datasheet SRAM Example
|
|
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5
|
SEPT 11
|
Microprogramming the RSRC
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Chapter 5 Microprogrammed RSRC Control Unit Microprogrammed RSRC CONTROL.VHD Microprogrammed RSRC CONTROLSTORE.VHD Microcoded RSRC VHDL Zip File Intel Software Developer's Manual (see pages 285, 339) Microprogrammed RSRC Control Unit Modified
|
Lab 1
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Homework 2
|
6
|
SEPT 13
|
1-Bus vs 2-Bus vs 3-Bus Microarchitecture Introduction to Pipelining
|
Chapter 4 2-Bus SRC Block Diagrams 3-Bus SRC Block Diagrams Chapter 5 Basic Pipelined SRC/RSRC
|
|
|
7
|
SEPT 18
|
Pipelining the SRC/RSRC
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Chapter 5 Table 5.1 Basic Pipelined SRC/RSRC Corrected Figure 5.15
|
Homework 3
|
|
8
|
SEPT 20
|
Pipelined SRC/RSRC VHDL/FPGA Implementation
Interrupts/Exceptions
|
Chapter 5 Pipelined SRC/RSRC Execution Simulation Chapter 4
|
|
|
9
|
SEPT 25
|
Review
|
|
|
Homework 3 Lab 1
|
10
|
SEPT 27
|
Exam 1
|
|
|
|
11
|
OCT 2
|
Memory DIMMs and Modules Introduction to Schematic Capture
|
Chapter 7 ExpressSCH Quick Start Guide
|
Homework 4
|
|
12
|
OCT 4
|
FPM DRAM SRC/RSRC FPM DRAM Design Examples
|
FPM DRAM Datasheet SRC/RSRC FPM DRAM Design Examples
|
|
|
13
|
OCT 9
|
SDRAM DDR DRAM DDR2 DRAM DDR3 DRAM
|
DRAM Types MT48LC8M8A2 SDRAM Datasheet MT46V128M8 DDR DRAM Datasheet MT47H256M8 DDR2 DRAM Datasheet MT41J512M8 DDR3 DRAM Datasheet MT40A1G8 DDR4 DRAM DDR2 Core for Digilent NEXYS4DDR Board Xilinx DDR3 Core for 7 Series FPGAs
|
|
|
14
|
OCT 11
|
Cache Virtual Memory
|
Chapter 7 SRC/RSRC Cache Example SRC/RSRC Cache Datapath Example Intel Core i7 (Haswell) Cache Parameters Virtual Memory Concepts Virtual Memory H&P
|
Homework 5
|
Homework 4
|
|
OCT 16
|
Fall Break
|
|
|
|
15
|
OCT 18
|
Memory-Mapped I/O Shared I/O Polling Interrupt-Driven I/O Direct Memory Access (DMA) The Multi-Master SRC Bus Bus Arbitration
|
Chapter 8 SRC Stereo Card Bus Alternatives SRC IN and OUT RTN Three-Slot Multi-Master SRC Motherboard
|
Lab 2
|
Homework 5
|
16
|
OCT 23
|
The PCI Bus
|
PCI Lecture Notes X86 Chipset Evolution
|
|
|
17
|
OCT 25
|
Serial vs. Parallel I/O Buses PCIe
|
LTSPICE Tutorial Reflection Lecture PCIe Lecture
|
|
|
18
|
OCT 30
|
Parity Hamming Codes ECC Memory
|
Chapter 8 Coding Theory 101 Hamming Codes PCIe CRC
|
Homework 6
|
|
19
|
NOV 1
|
Disks Video DACs ADCs
|
Chapter 9 SRC Video Example R2R DAC Example Flash ADC Example
|
|
|
20
|
NOV 6
|
USB 2.0/3.0 IEEE 1394 (Firewire)
|
Chapter 10 USB 2.0 Specification
|
|
Homework 6
|
21
|
NOV 8
|
Exam 2
|
|
|
|
22
|
NOV 13
|
Very Long Instruction Word (VLIW) Computing Superscalar/Out-of-Order Processing
|
CPU History Fisher Paper 1 Fisher Paper 2 VLIW Notes AMD K7 Presentation
|
|
|
23
|
NOV 15
|
Explicitly Parallel Instruction Computing (EPIC) 64-Bit Desktop Computing: AMD vs. Intel
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Intel Intanium AMD Hammer
|
|
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24
|
NOV 20
|
Transmeta Crusoe
|
David Ditzel Transmeta Crusoe White Paper HP Transmeta Crusoe Laptop
|
|
|
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NOV 22
|
Thanksgiving Break
|
|
|
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25
|
NOV 27
|
Symmetric Multiprocessing (SMP) Simultaneous Multithreading (SMT) Introduction to Multicore/Cache Coherency →Global Directory →MESI (Snoopy/Pentium II) →MOESI (ccNUMA/AMD Hammer) →MESIF (ccNUMA/Intel Xeon Phi)
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Intel Core i9 SPARC T5 Censier Paper Illinois Protocol Paper (1984) Intel Pentium II MESI Chipset AMD Hammer Intel Xeon Phi
|
|
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26
|
NOV 29
|
Deep Dive: The Illinois Protocol (MESI)
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Illinois Protocol Paper (1984) Intel Pentium II MESI Chipset
|
|
|
27
|
DEC 4
|
Supercomputing
|
Top 500 FLOPS Longbottom's Linpack Page WUSTL CHPC CHPC Photo WUSTL SEAS Linux Lab Cluster
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|
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28
|
DEC 6
|
Exam 3
|
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