File list

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This special page shows all uploaded files.

File list
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Date Name Thumbnail Size User Description Versions
14:00, 11 February 2010 Metastability 1.pdf (file) 158 KB Wdr   1
14:00, 11 February 2010 Metastability 2.pdf (file) 1.23 MB Wdr   1
19:40, 18 January 2012 Espresso.zip (file) 81 KB Wdr   1
19:46, 18 January 2012 EspressoExample.txt (file) 242 bytes Wdr   1
19:46, 18 January 2012 EspressoOutput.txt (file) 106 bytes Wdr   1
16:25, 19 January 2012 CyclicOutput.txt (file) 105 bytes Wdr   1
16:26, 19 January 2012 CyclicExample.txt (file) 249 bytes Wdr   1
15:15, 26 January 2012 Standard Cell.JPG (file) 903 KB Wdr   1
15:22, 26 January 2012 Example1.vhd (file) 443 bytes Wdr   1
15:23, 26 January 2012 Example1RTL.pdf (file) 10 KB Wdr   1
15:24, 26 January 2012 Example1Technology.pdf (file) 9 KB Wdr   1
15:26, 26 January 2012 Example2.vhd (file) 831 bytes Wdr   1
15:26, 26 January 2012 Example2RTL.pdf (file) 14 KB Wdr   1
15:26, 26 January 2012 Example2Technology.pdf (file) 10 KB Wdr   1
15:29, 26 January 2012 P145-cong.pdf (file) 614 KB Wdr   1
19:20, 30 January 2012 Example3.vhd (file) 172 KB Wdr   1
19:20, 30 January 2012 Example4.vhd (file) 548 bytes Wdr   1
19:20, 30 January 2012 Example4Technology.pdf (file) 10 KB Wdr   1
19:20, 30 January 2012 Example5.vhd (file) 548 bytes Wdr   1
19:20, 30 January 2012 Example5Technology.pdf (file) 12 KB Wdr   1
19:20, 30 January 2012 Example6.vhd (file) 547 bytes Wdr   1
19:20, 30 January 2012 Example6Technology.pdf (file) 14 KB Wdr   1
19:20, 30 January 2012 Example7.vhd (file) 547 bytes Wdr   1
19:20, 30 January 2012 Example7Technology.pdf (file) 18 KB Wdr   1
16:50, 31 January 2012 Example8.vhd (file) 547 bytes Wdr   1
16:50, 31 January 2012 Example8Technology.bmp (file) 42 KB Wdr   1
14:52, 2 February 2012 Edwin Robbins.jpg (file) 276 KB Wdr   1
21:19, 2 February 2012 Altera vs Xilinx.pdf (file) 949 KB Wdr   1
21:21, 2 February 2012 Xilinx vs Altera.pdf (file) 138 KB Wdr   1
21:23, 2 February 2012 Altera Logic Efficiency Analysis.pdf (file) 1.09 MB Wdr   1
21:24, 2 February 2012 Altera FPGA Architecture White Paper.pdf (file) 637 KB Wdr   1
19:17, 3 February 2012 Example9.vhd (file) 160 KB Wdr   1
19:17, 3 February 2012 Example10Technology.pdf (file) 25 KB Wdr   1
19:17, 3 February 2012 Example10.vhd (file) 171 KB Wdr   1
19:29, 3 February 2012 Example9Technology.bmp (file) 1.33 MB Wdr   1
17:54, 5 February 2012 Example10TechnologyPH.pdf (file) 23 KB Wdr   1
18:06, 5 February 2012 Example11TechnologyPH.pdf (file) 24 KB Wdr   1
18:06, 5 February 2012 Example11.vhd (file) 174 KB Wdr   1
18:08, 5 February 2012 Example11Technology.pdf (file) 28 KB Wdr   1
18:49, 5 February 2012 Example9TechnologyPH.bmp (file) 1.44 MB Wdr   1
16:33, 9 February 2012 Bit Zero Optimal LUTs.pdf (file) 33 KB Wdr   1
18:15, 13 February 2012 Figure7dot4.vhd (file) 2 KB Wdr   1
18:19, 13 February 2012 Figure7dot4.pdf (file) 10 KB Wdr   1
18:20, 13 February 2012 Example12Technology.pdf (file) 10 KB Wdr   1
19:04, 13 February 2012 Figure7dot4v2.vhd (file) 2 KB Wdr   1
19:10, 13 February 2012 Figure7dot4v3.vhd (file) 2 KB Wdr   1
19:12, 13 February 2012 DefaultV1SynthesisReport.txt (file) 16 KB Wdr   1
19:24, 13 February 2012 DefaultV2SynthesisReport.txt (file) 16 KB Wdr   1
19:24, 13 February 2012 DefaultV3SynthesisReport.txt (file) 15 KB Wdr   1
16:14, 16 February 2012 DefaultV4SynthesisReport.txt (file) 16 KB Wdr   1
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