CSE365

Elements of Computing Systems

Assignment 2

Due Date: 2015-2-1, 11:59pm

Objective

Complete HDL implementations for the following 5 gates so that the tests are successful.
  1. HalfAdder
  2. FullAdder
  3. Add16
  4. Inc16
  5. ALU

Tips and Resources

  • You may (and should) use any or all of the chips you defined for Assignment 1. For best performance, you can use the built-in versions of those chips. The Hardware Simulator will use the built-in versions as long as the HDL files are in a separate folder from this assignment's files.
  • If you wanted to add two specific numbers using your Add16 gate (say, 7 and 5), the syntax could be this:
    Add16(a[0..2]=true, a[3..15]=false, b[0]=true, b[1]=false, b[3]=true, out=out);
    Note that the range notation is inclusive, and that unspecified pins default to false.
  • For reasons unbeknownst to me, the Hardware Simulator is very specific about how it lets you split up buses. Consider the following.
    Add16(a=a, b=b, out=c);
    Or8Way(in=c[0..7], out=d); // This is wrong.
    This will result in the error "Sub bus of an internal node may not be used." Instead, specify the output of your first gate differently.
    Add16(a=a, b=b, out=c[0..7]);
    Or8Way(in=c, out=d); // This is correct.
  • The Hardware Simualtor also doesn't like it if you connect the output of the gate you're constructing to the input of another gate within the gate you're constructing. For example, if your output is "out", then you can't do this:
    Add16(a=a, b=b, out=out);
    Add16(a=out, b=out, out=double); // This is wrong.
    This will result in the error, "Can't connect gate's output pin to part.". Instead, specify an extra output from the first gate.
    Add16(a=a, b=b, out=out, out=c);
    Add16(a=c, b=c, out=double); // This is correct.
  • The logic for the ALU can be found in Chapter 2, on page 9 of the PDF and page 37 of the book. Note that if both the zero bit and negate bits are true, then you should zero the input and THEN negate, not the other way around.
  • HDL reference