Assignment 1
In this project, you will create a set of basic logic gates, starting with gates that just include a few bits as input and then moving up to gates that use 16 bit inputs.
Due Date: 2015-1-25, 11:59pm
Objective
Complete HDL implementations for the following 15 gates so that the tests are successful.
Simple Gates
Not, And, Or, Xor, Mux, DMux
16-bit Versions
Not16, And16, Or16, Mux16
Multiple Inputs
Or8Way, Mux4Way16, Mux8Way16, DMux4Way, DMux8Way
Tips and Resources
- It is recommended that you complete the gates in the order listed. Also, each gate can use all the gates before it, and the Nand gate.
- Note the bit ordering is important for the more complex Muxes. They are written in the opposite order of strings, i.e. if something says sel=110, then sel[0] is ZERO, not ONE.
- Some solutions may involve a fair bit of copying and pasting, and that's expected.
- For clarity and simplicity, use as few gates as reasonable.
- Book Chapter
- HDL reference
- Various other tips
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