Difference between revisions of "Datasheets"
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*[[media:FX3-DVK-BOARD-DEVICE_REV3_08-29.pdf|FX3 Development Board Schematics]] | *[[media:FX3-DVK-BOARD-DEVICE_REV3_08-29.pdf|FX3 Development Board Schematics]] | ||
*[[media:FX3_Slave_FIFO_Interface.pdf|Cypress FX3 Slave FIFO Interface Application Note]] | *[[media:FX3_Slave_FIFO_Interface.pdf|Cypress FX3 Slave FIFO Interface Application Note]] | ||
+ | *[[media:Test.pdf|Sonia's Verilog Loopback Code]] | ||
*[[media:Sp601_product_brief.pdf|Xilinx SP601 Evaluation Kit Product Brief]] | *[[media:Sp601_product_brief.pdf|Xilinx SP601 Evaluation Kit Product Brief]] | ||
*[[media:Ug518.pdf|Xilinx SP601 User Guide]] | *[[media:Ug518.pdf|Xilinx SP601 User Guide]] |
Revision as of 16:40, 19 March 2013
- USB 3.0 Specification (from USB.org)
- Cypress FX3 Datasheet
- FX3 Development Kit User Guide
- FX3 Development Kit Quick Start Guide
- FX3 Development Board Schematics
- Cypress FX3 Slave FIFO Interface Application Note
- Sonia's Verilog Loopback Code
- Xilinx SP601 Evaluation Kit Product Brief
- Xilinx SP601 User Guide
- Xilinx SP601 Getting Started with the SP601
- Xilinx SP601 Hardware Setup Guide
- Xilinx SP601 Schematics
- Agile Solutions Adapter Schematics
- Xilinx Spartan 6 LX Family Overview
- Xilnx Spartan 6 LX Family Switching Characteristics
- Xilinx Spartan 6 FPGA Packaging and Pinouts
- Xilinx Spartan 6 Libraries Guide for HDL (see page 225)
- Xilinx Spartan 6 FPGA Clock Resources User Guide (see page 113)
- Xilinx CoolRunner-II CPLD Family Datasheet
- Xilinx CoolRunner-II XC2C64 CPLD Datasheet
- ECS 3518/3525 SMT Oscillator Datasheet
- JTAG Header Footprint
- TLV700xx 1.8V/2.5V LDO Regulator Datasheet
- PLX Duet Technology
- CAST USB 3.0 Xilinx Core
- Innovative Logic USB 3.0 Core
- Ellisys USB Explorer 280
- SAMTEC Header
- I2C Specification