Difference between revisions of "Syllabus"
From CSE362 Wiki
Jump to navigationJump to search| Line 36: | Line 36: | ||
|4 | |4 | ||
|SEPT 7 | |SEPT 7 | ||
| − | |1-Bus SRC Microarchitecture<br /> | + | |1-Bus SRC Microarchitecture<br />Datapath Refinement<br />1-Bus SRC Concrete RTN |
|[[media:Ch4WDR.pdf|Chapter 4]] | |[[media:Ch4WDR.pdf|Chapter 4]] | ||
|Homework 2 | |Homework 2 | ||
| Line 44: | Line 44: | ||
|5 | |5 | ||
|SEPT 12 | |SEPT 12 | ||
| − | | | + | |1-Bus SRC Control FSM<br />2-Bus SRC Microarchitecture<br />3-Bus SRC Microarchitecture |
| − | | | + | |[[media:Ch4WDR.pdf|Chapter 4]] |
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Revision as of 18:19, 10 May 2017
| LECTURE | DATE | TOPICS | PREPARATION | ASSIGNED | DUE |
| 1 | AUG 29 | Course Introduction Classification of Computers and Instructions RISC vs. CISC |
Course Introduction Chapter 1 Chapter 2 |
||
| 2 | AUG 31 | Addressing Modes The Simple RISC Computer (Introduction) SRC Assembly Language |
Chapter 2 | Homework 1 | |
| 3 | SEPT 5 | SRC Abstract RTN Displacement-Based Addressing |
Chapter 2 SRC Abstract RTN |
||
| 4 | SEPT 7 | 1-Bus SRC Microarchitecture Datapath Refinement 1-Bus SRC Concrete RTN |
Chapter 4 | Homework 2 | Homework 1 |
| 5 | SEPT 12 | 1-Bus SRC Control FSM 2-Bus SRC Microarchitecture 3-Bus SRC Microarchitecture |
Chapter 4 | ||
| 6 | SEPT 14 | Homework 3 | Homework 2 | ||
| 7 | SEPT 19 | ||||
| 8 | SEPT 21 | Homework 3 | |||
| 9 | SEPT 26 | ||||
| 10 | SEPT 28 | Exam 1 | |||
| 11 | OCT 3 | ||||
| 12 | OCT 5 | ||||
| 13 | OCT 10 | ||||
| 14 | OCT 12 | ||||
| 15 | OCT 19 | ||||
| 16 | OCT 24 | ||||
| 17 | OCT 26 | ||||
| 18 | OCT 31 | ||||
| 19 | NOV 2 | ||||
| 20 | NOV 7 | ||||
| 21 | NOV 9 | ||||
| 22 | NOV 14 | ||||
| 23 | NOV 16 | ||||
| 24 | NOV 21 | ||||
| 25 | NOV 28 | ||||
| 26 | NOV 30 | ||||
| 27 | DEC 5 | ||||
| 28 | DEC 7 | Exam 3 |
