Mentor Graphics Tutorial

If this is the first time you have used the Mentor Graphics tools create the following new directories:

Setup your environment (you must do this every time you log onto the workstation or add it to your shell startup script):

If this is the first time you have used the Mentor Graphics tools create a special working directory for Mentor Graphics (using the vlib program):

Use your favorite editor to create a vhdl source file. There are several to choose from. vi and emacs are popular editors. The description below is for a Partial Full Adder and is the example for this tutorial.

-- This is a description of a partial full adder (PFA) circuit.
library IEEE;
use IEEE.std_logic_1164.all;

entity pfa is
 port (
 a: in STD_LOGIC; -- You could have put all of the
 b: in STD_LOGIC; -- same signal types on the same
 c: in STD_LOGIC; -- line. Separate the signals
 s: out STD_LOGIC; -- with a comma.
 p: out STD_LOGIC;
 g: out STD_LOGIC -- Notice this line doesn't end with
 ); -- a semi-colon.
end pfa;

architecture pfa_arch of pfa is
 signal t: std_logic; -- VHDL is case insensitive.
begin -- You can mix upper and lower case.
 g <= a and b; -- The signal assignment operator
 t <= a xor b -- is "<=".
 p <= t;
 s <= t xor c;
end pfa_arch;

If you can display X11 applications, start the simulator "vsim &". The & runs the program in the background so you can still use your terminal window. You should see the following:

view wave
view signals
vsim work.pfa(pfa_arch)

add wave sim:/pfa/a
add wave sim:/pfa/b
add wave sim:/pfa/c
add wave sim:/pfa/s
add wave sim:/pfa/p
add wave sim:/pfa/g

force -freeze sim:/pfa/a 0 0
force -freeze sim:/pfa/b 0 0
force -freeze sim:/pfa/c 0 0
run
force -freeze sim:/pfa/a 1 0
run
force -freeze sim:/pfa/a 0 0
force -freeze sim:/pfa/b 1 0
run
force -freeze sim:/pfa/a 1 0
run
force -freeze sim:/pfa/a 0 0
force -freeze sim:/pfa/b 0 0
force -freeze sim:/pfa/c 1 0
run
force -freeze sim:/pfa/a 1 0
run
force -freeze sim:/pfa/a 0 0
force -freeze sim:/pfa/b 1 0
run
force -freeze sim:/pfa/a 1 0
run

You could have used the graphical interface to accomplish the same task as executing the .do file. When you do use the graphical interface the equivalent command will show at the ModelSim prompt. This is a good way to discover commands that can be added to a .do file.

Lets examine tst.do line by line. The first line "view wave" starts up the wave dialog box. "view signals" likewise starts the signals dialog box. vsim work.pfa(pfa_arch) tells ModelSim to load the pfa entity. The six "add wave" commands add the three input and three output signals of the pfa entity to the wave dialog box. The "force" commands force the input signals to a known state as though it were being driven by an external signal. The "run" command advances the simulator by a default of 100 nS. If you want a different time, the run command takes an optional argument in nS.

Look at how the "force" commands alternate with the "run" command. The "force" commands are causing the input signals to change state every 100 nS between "run" commands. This is how every possible input combination is shown on the wave dialog box. Does the Partial Full Adder behave as expected?

Put the mouse pointer somewhere over the timing diagram in the wave dialog box. Click the left mouse button. A vertical line should appear that makes it easier to see the state of all signals at a given time. See if you can figure out how to measure time between two signal transitions. Also, can you expand or shrink the time axis?

The signals dialog box shows the current state of the the three input, three output, and the internal signal "t".

See if you can duplicate the above procedure for other combinational logic circuits such as multiplexers, decoders, and priority encoders.

Introduction to Digital Logic and Computer Design

Mentor Graphics Tutorial