Uploads by Wdr

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Date Name Thumbnail Size Description Versions
20:31, 26 April 2016 AsynchArt.pdf (file) 140 KB   1
14:01, 19 April 2016 CDC Lecture 2016.pdf (file) 1.13 MB   1
18:01, 13 April 2016 Bist.pdf (file) 287 KB   1
17:59, 13 April 2016 Fsmtest.pdf (file) 359 KB   1
17:56, 13 April 2016 Test.pdf (file) 160 KB   1
14:33, 12 April 2016 Designing the Edge-Triggered D Flip-Flop.pdf (file) 209 KB   1
19:31, 7 April 2016 Designing a Sequence Detector.pdf (file) 229 KB   1
22:18, 5 April 2016 Kohavi Text Example.pdf (file) 244 KB   1
13:56, 29 March 2016 BCP Reduction Techniques.pdf (file) 75 KB   1
15:50, 3 March 2016 Definition of Prime Compatible.pdf (file) 93 KB   1
15:58, 24 April 2014 The Reflected Binary (Gray) Code.pdf (file) 81 KB   1
15:51, 22 April 2014 Oscillators and Clock Distribution.pdf (file) 414 KB   1
15:23, 22 April 2014 Designing an Asynchronous Counter.pdf (file) 75 KB   1
15:23, 16 April 2014 Cucs-033-94.pdf (file) 240 KB   1
15:00, 16 April 2014 S40C18 DataSheet.pdf (file) 926 KB   1
19:18, 14 April 2014 Introduction to Asynchronous Circuits.pdf (file) 330 KB   1
18:52, 10 April 2014 Asynchronous.pdf (file) 239 KB   1
20:04, 4 April 2014 Designing the SR Latch.pdf (file) 97 KB   1
16:02, 2 April 2014 How Fast Can We Clock A Circuit.pdf (file) 76 KB   1
14:18, 2 April 2014 Metastability Lecture.pdf (file) 50 KB   1
18:42, 1 April 2014 Zar Metastability Lecture.pdf (file) 507 KB   1
15:55, 24 March 2014 Prime Compatibles Example Revised.pdf (file) 187 KB   1
20:10, 21 March 2014 Simplification of Incompletely Specified Machines 1.pdf (file) 141 KB   1
18:07, 21 March 2014 Simplification of Incompletely Specified Machines 2.pdf (file) 83 KB   1
15:22, 21 March 2014 State Assignment.pdf (file) 135 KB   1
16:20, 19 March 2014 Cmos-clock-datasheet.pdf (file) 155 KB   1
16:01, 6 March 2014 Simplification of Incompletely Specified Machines.pdf (file) 139 KB   1
17:16, 26 February 2014 ISE Simulator Screenshot 2.png (file) 73 KB   1
17:14, 26 February 2014 ISE Simulator Screenshot 1.png (file) 93 KB   1
20:25, 25 February 2014 StateEqualOutputWithTiming2.png (file) 125 KB   1
20:05, 25 February 2014 StateEqualOutputSimulationWithTiming.pdf (file) 173 KB   1
21:52, 20 February 2014 DefaultV5SynthesisReport.txt (file) 15 KB   1
21:49, 20 February 2014 FIGURE7DOT4THREESTATES.png (file) 35 KB   1
21:44, 20 February 2014 FIGURE7DOT4V5.png (file) 143 KB   1
21:43, 20 February 2014 FIGURE7DOT4.png (file) 116 KB   1
20:06, 20 February 2014 Minimizing Completely Specified Machines.pdf (file) 59 KB   1
19:27, 20 February 2014 Definitions and Theorems for Sequential Machines.pdf (file) 111 KB   1
16:50, 20 February 2014 Stateequaloutputsynthesisreport4.txt (file) 16 KB   1
16:49, 20 February 2014 StateEqualOutputSimulation4.pdf (file) 58 KB   1
16:44, 20 February 2014 Stateequaloutput4.vhd (file) 2 KB   1
16:41, 20 February 2014 StateEqualOutputTechnology4.pdf (file) 12 KB   1
17:19, 19 February 2014 State Equal Output Moore Example Fixed.pdf (file) 101 KB   1
21:37, 18 February 2014 Stateequaloutputsynthesisreport3.txt (file) 16 KB   1
21:35, 18 February 2014 StateEqualOutputTechnology3.pdf (file) 13 KB   1
21:35, 18 February 2014 StateEqualOutputSimulation3.pdf (file) 62 KB   1
21:34, 18 February 2014 Stateequaloutput3.vhd (file) 2 KB   1
21:14, 18 February 2014 StateEqualOutputSimulation2.pdf (file) 57 KB   1
21:12, 18 February 2014 StateEqualOutputSimulation.pdf (file) 57 KB   1
20:25, 18 February 2014 Stateequaloutputsynthesisreport2.txt (file) 16 KB   1
20:15, 18 February 2014 Stateequaloutput2.vhd (file) 2 KB   1
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