****************************************
Report : power
        -analysis_effort low
Design : opticalflow
Version: J-2014.09-SP5
Date   : Fri Oct 28 13:01:35 2016
****************************************


Library(s) Used:

    vtvt_tsmc180 (File: /project/linuxlab/cadence/vendors/VTVT/vtvt_tsmc180/Synopsys_Libraries/libs/vtvt_tsmc180.db)


Operating Conditions: nom_pvt   Library: vtvt_tsmc180
Wire Load Model Mode: top


Global Operating Voltage = 1.8  
Power-specific unit information :
    Voltage Units = 1V
    Capacitance Units = 1.000000ff
    Time Units = 1ps
    Dynamic Power Units = 1mW    (derived from V,C,T units)
    Leakage Power Units = 1mW


  Cell Internal Power  =  67.2453 mW   (99%)
  Net Switching Power  = 429.3519 uW    (1%)
                         ---------
Total Dynamic Power    =  67.6747 mW  (100%)

Cell Leakage Power     =   9.2601 uW


                 Internal         Switching           Leakage            Total
Power Group      Power            Power               Power              Power   (   %    )  Attrs
--------------------------------------------------------------------------------------------------
io_pad             0.0000            0.0000            0.0000            0.0000  (   0.00%)
memory             0.0000            0.0000            0.0000            0.0000  (   0.00%)
black_box          0.0000            0.0000            0.0000            0.0000  (   0.00%)
clock_network      0.0000            0.0000            0.0000            0.0000  (   0.00%)
register          66.9407        1.0376e-02        8.2286e-03           66.9590  (  98.93%)
sequential         0.0000            0.0000            0.0000            0.0000  (   0.00%)
combinational      0.3058            0.4190        1.0315e-03            0.7258  (   1.07%)
--------------------------------------------------------------------------------------------------
Total             67.2464 mW         0.4294 mW     9.2601e-03 mW        67.6848 mW
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