General Information

From CSE462 Wiki
Revision as of 14:26, 16 April 2015 by Wdr (talk | contribs)
Jump to navigationJump to search

Instructor, William D. Richard, Ph.D., Bryan Hall 307B, 314-935-4676, wdr@wustl.edu

Office Hours: Monday and Wednesday, 1:00-2:00 p.m. or by appointment

Course Web Page: http://classes.engineering.wustl.edu/cse462/index.php/Main_Page

Text: NA (You should have access to a VHDL reference.)

Class Meeting: Tuesdays and Thursdays, 1:00-2:30 a.m., Lopata Hall Room 201

Exam #1: Thursday, February 5th, 2015

Final Exam: Tuesday, May 5th, 2015

Project Presentations: April 23, 2015

Paper Due: April 24, 2015

Grading: Two exams, 20% each. Homework: 10%. Project: 50%.

Homework: Homework will be assigned weekly prior to the first exam. Homework turned in at the start of class on the due date will be graded by the instructor. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity.