Difference between revisions of "Lecture Notes"
From CSE462 Wiki
Jump to navigationJump to searchLine 1: | Line 1: | ||
+ | *[[media:BANDWIDTH_DIAGRAMS.pdf|Bandwidth Diagrams]] | ||
*[[media:BANDWIDTH1.pdf|Bandwidth Example 1 VHDL]] | *[[media:BANDWIDTH1.pdf|Bandwidth Example 1 VHDL]] | ||
*[[media:BANDWIDTH2.pdf|Bandwidth Example 2 VHDL]] | *[[media:BANDWIDTH2.pdf|Bandwidth Example 2 VHDL]] |
Revision as of 18:01, 23 April 2013
- Bandwidth Diagrams
- Bandwidth Example 1 VHDL
- Bandwidth Example 2 VHDL
- ODDR2 (and other) VHDL examples
- ODDR2 27 MHz (Green) and PCLK Waveforms
- NO DCM 27 MHz (Green) and PCLK Waveforms
- Customer Presentation
- Efficient Parallel Upsampling
- Chalk Board Loopback Block Diagram
- Chalk Board Loopback Timing Diagram
- Updated Loopback Timing Diagram
- GPIF II Example
- VHDL Lecture
- State Equal Output Moore Machine Example
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
- VHDL Lecture
- CPLD Timing 1
- CPLD Timing 2
- Metastability 1
- Metastability 2
- IEEE Code of Ethics
- Employment Contract
Links: