Difference between revisions of "Syllabus"
From CSE462 Wiki
Jump to navigationJump to search (Created page with ' 1. The Universal Serial Bus 1. The Universal Serial Bus V1.1 and V2.0 2. The FTDI and Cypress USB Chips 3. Prototype Boards 2. FPGAs …') |
|||
Line 1: | Line 1: | ||
− | + | # The Universal Serial Bus | |
− | + | ## The Universal Serial Bus V1.1 and V2.0 | |
− | + | ## The FTDI and Cypress USB Chips | |
− | + | ## Prototype Boards | |
− | + | # FPGAs | |
− | + | ## Actel and Xilinx FPGAs | |
− | + | ## Tool Support | |
− | + | ## Development Scripts | |
− | + | # VHDL | |
− | + | ## VHDL Review | |
− | + | ## Synthesizable VHDL | |
− | + | # Semester Project Requirements | |
− | + | ## Requirements | |
− | + | ## Basic Block Diagram | |
− | + | ## Testing | |
− | + | # Advanced Topics | |
− | + | ## PCI | |
− | + | ## Firewire | |
− | + | # Professional and Ethical Responsibilities, Lifelong Learning | |
− | + | ## ACM Code of Ethics | |
− | + | ## IEEE Code of Ethics | |
− | + | ## Lifelong Learning | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− |
Revision as of 22:39, 11 November 2009
- The Universal Serial Bus
- The Universal Serial Bus V1.1 and V2.0
- The FTDI and Cypress USB Chips
- Prototype Boards
- FPGAs
- Actel and Xilinx FPGAs
- Tool Support
- Development Scripts
- VHDL
- VHDL Review
- Synthesizable VHDL
- Semester Project Requirements
- Requirements
- Basic Block Diagram
- Testing
- Advanced Topics
- PCI
- Firewire
- Professional and Ethical Responsibilities, Lifelong Learning
- ACM Code of Ethics
- IEEE Code of Ethics
- Lifelong Learning