Difference between revisions of "Lecture Notes"

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*[[media:CSE_462M_COURSE_INTRODUCTION.pdf|Course Introduction]]
 
*[[media:CSE_462M_COURSE_INTRODUCTION.pdf|Course Introduction]]
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*[[media:0714IFD1.pdf|Use Advanced PCB Technology to Produce 50% Smaller Product Designs]]
 
*[[media:0714IFD1.pdf|Use Advanced PCB Technology to Produce 50% Smaller Product Designs]]
 
*[[media:Reflection_Lecture.pdf|Reflection Lecture]]
 
*[[media:Reflection_Lecture.pdf|Reflection Lecture]]
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*[[media:Oscillators_and_Clock_Distribution.pdf|Oscillators and Clock Distribution]]
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*[[media:Lumped_Lecture.pdf|Lumped Lecture]]
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*[[media:ExpressPCB-Service-Matrix-12-7-2016.pdf|ExpressPCB Board Specifications]]
 
*[[media:Maximum_ExpressPCB_Trace_Impedance.pdf|Maximum ExpressPCB Trace Impedance]]
 
*[[media:Maximum_ExpressPCB_Trace_Impedance.pdf|Maximum ExpressPCB Trace Impedance]]
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*[[media:NTSC_Video.pdf|NTSC Video]]
 
*[[media:NTSC_Video.pdf|NTSC Video]]
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*[[media:HP_Mini_10_VGA_HS_and_VS.pdf|HP Mini 10 VGA HS and VS Signals]]
  
  
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*[[media:AN-5017.pdf|LVDS Fundamentals]]
 
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*[[media:R2R_Circuit.pdf|R-2R DAC Circuit]]
 
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*[[media:R2R_SPICE.pdf|R-2R DAC SPICE DECK]]
 
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*[[media:R2R_Simulation.pdf|R-2R DAC Simulation]]
 
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*[[media:AN810.pdf|Understanding Flash ADCs]]
 
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*[[media:fermilab-conf-07-601-e.pdf|Fermilab ADC/TDC in FPGA Paper]]
 
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*[[media:Ramp_Generator.pdf|Analog Ramp Generator]]
 
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*[[media:MLE-TB20110419.pdf|Altera Delta-Sigma ADC in FPGA Paper]]
 
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*[[media:Volume-1Number-2PP-508-513.pdf|Xilinx Modified Delta-Sigma ADC in FPGA Paper]]
 
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*[[media:CreatingAnADCUsingFPGAResources.pdf|Lattice Semiconductor ADC White Paper]]
 
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*[[media:SAR_ADC_Paper.pdf|Successive Approximation ADC in FPGA Paper]]
 
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*[[media:deltasigma.pdf|Modified Delta-Sigma SPICE Model]]
 
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*[[media:FFTMAG.png|FFT Magnitude]]
 
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*[[media:Modified_Delta-Sigma_Test_Results.pdf|WDR Test PCB Scope Plots (Instructor Only)]]
 
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*[[media:Manar_Filter_Output.pdf|Manar Filter Output (Instructor Only)]]
 
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*[[media:Recovering_the_Input.pdf|(Comments on) Recovering the Input Signal]]
 
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*[[media:AD9748.pdf|Example 8-bit 210 Msample/s Current Output DAC]]
 
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*[[media:AD9764.pdf|Example 14-bit 125 Msample/s Current Output DAC]]
 
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*[[media:LTC2000_DAC.pdf|Example 16-bit 2.5 Gsample/s Current Output DAC]]
 
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*[[media:Adc12j4000.pdf|Example 12-bit 4 Gs/s ADC]]
 
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*[[media:Oscillators_and_Clock_Distribution.pdf|Oscillators and Clock Distribution]]
 
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*[[media:Lumped_Lecture.pdf|Lumped Lecture]]
 
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*[[media:ug382.pdf|Spartan 6 FPGA Clocking Resources User Guide]]
 
 
*[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]]
 
*[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]]
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*[[media:Simulation_Tutorial.pdf|Xilinx ISE Simulation Tutorial]]
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*[[media:FIFO_TUTORIAL.pdf|Xilinx ISE 14.7 FIFO Tutorial]]
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*[[media:Dualport_RAM_Tutorial.pdf|Xilinx ISE 14.7 Dualport RAM Tutorial]]
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*[[media:DCM_Tutorial.pdf|Xilinx ISE 14.7 DCM Tutorial]]
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*[[media:ISE_VGA_Tutorial.pdf|Xilinx ISE 14.7 VGA Tutorial]]
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*[[media:Using_LVDS_Inputs.pdf|Xilinx ISE 14.7 LVDS Input Tutorial]]
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*[[media:Simulation_Tutorial.pdf|Xilinx ISE 14.7 Simulation Tutorial]]
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*[[media:MCS_File_Tutorial.pdf|Xilinx ISE 14.7 MCS File Tutorial]]
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*[[media:Vga.pdf|Xilinx ISE 14.7 Digilent Spartan 3E Board VGA UCF File]]
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*[[media:loopback.pdf|Xilnix ISE 14.7 Digilent Spartan 3E Board Loopback UCF File (Instructor Only)]]
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*[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]]
 
*[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]]
 
*[[media:Metastability 1.pdf|Anomalous Behavior of Synchronizer and Arbiter Circuits]]
 
*[[media:Metastability 1.pdf|Anomalous Behavior of Synchronizer and Arbiter Circuits]]
 
*[[media:Metastability 2.pdf|Measured Flip-Flop Responses to Marginal Triggering]]
 
*[[media:Metastability 2.pdf|Measured Flip-Flop Responses to Marginal Triggering]]
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*[[media:ieee_codeofethics.pdf|IEEE Code of Ethics]]
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*[[media:Employment Contract - Clean.pdf|Employment Contract]]
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*[[media:Employment Contract - Clean.pdf|Example Corporate Employment Contract]]
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Links:
 
Links:
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[http://www.fpga4fun.com/HDMI.html HDMI Info]
  
 
[http://www.epanorama.net/documents/pc/vga_timing.html VGA Timing]
 
[http://www.epanorama.net/documents/pc/vga_timing.html VGA Timing]
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[http://math.stackexchange.com/questions/397586/intuitive-way-to-understand-the-square-wave-spectrum Fourier Transform of a Square Wave]
 
  
 
[http://emclab.mst.edu/pcbtlc2/ PCB Trace Impedance Calculator]
 
[http://emclab.mst.edu/pcbtlc2/ PCB Trace Impedance Calculator]
  
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[https://davidkessner.wordpress.com/2011/05/01/adc-in-an-fpga/ ADC in an FPGA (Part 1)]
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[http://www.xilinx.com/itp/xilinx10/isehelp/ise_c_constraints_timing_strategies.htm Xilinx ISE Timing Constraints Strategies]
  
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[https://davidkessner.wordpress.com/2011/06/05/adc-in-an-fpga-part-2/ ADC in an FPGA (Part 2)]
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[http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_c_introduction_indirect_programming.htm Introduction to Xilinx Indirect Programming]
  
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[http://www.xilinx.com/itp/xilinx10/isehelp/ise_c_constraints_timing_strategies.htm Xilinx ISE Timing Constraints Strategies]
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[http://www.acm.org/about/code-of-ethics?searchterm=code+of+ethics ACM Code of Ethics]
  
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[http://www.acm.org/about/code-of-ethics?searchterm=code+of+ethics ACM Code of Ethics]
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[http://www.ieee.org/about/corporate/governance/p7-8.html IEEE Code of Ethics]

Latest revision as of 16:45, 12 January 2018







Links:

HDMI Info

VGA Timing

PCB Trace Impedance Calculator

Xilinx ISE Timing Constraints Strategies

Introduction to Xilinx Indirect Programming

ACM Code of Ethics

IEEE Code of Ethics

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