Difference between revisions of "General Information"
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Text: NA (You should have access to a VHDL reference.) | Text: NA (You should have access to a VHDL reference.) | ||
| − | Class Meeting: Tuesdays and Thursdays, 1:00-2:30 a.m. | + | Class Meeting: Tuesdays and Thursdays, 1:00-2:30 a.m. Lopata 302 |
Mid-term Exam: TBD | Mid-term Exam: TBD | ||
Revision as of 17:27, 29 December 2009
Instructor, William D. Richard, Ph.D., Bryan Hall 307B, 314-935-4676, wdr@wustl.edu
Office Hours: Monday and Wednesday, 1:00-2:00 p.m. or by appointment
Course Web Page: http://classes.engineering.wustl.edu/cse462
Text: NA (You should have access to a VHDL reference.)
Class Meeting: Tuesdays and Thursdays, 1:00-2:30 a.m. Lopata 302
Mid-term Exam: TBD
Final Exam: TBD
Paper Due: TBD
Project Presentations: TBD
Grading: Two exams, 30% each. Project: 30%. Homework/quizzes are 10%.
Homework: Homework will be assigned weekly. It will be due one week after it is assigned. Homework will be turned in at the start of class on the due date. No late homework will be accepted. Homework should be done on an individual basis but you may confer with your friends, course consultants, graders, etc.
