Difference between revisions of "Syllabus"
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## Memory Subsystem in the Computer | ## Memory Subsystem in the Computer | ||
# Input/Output | # Input/Output | ||
− | ## I/O Subsystems | + | ## I/O Subsystems Overview |
## Programmed I/O | ## Programmed I/O | ||
− | ## | + | ### General Principles |
+ | ### Example: Programmed I/O on the SRC* | ||
+ | ## Interrupt-Driven I/O | ||
## DMA (Direct Memory Access) | ## DMA (Direct Memory Access) | ||
+ | ### General Principles | ||
+ | ### Example: DMA Engine for the SRC (w/VHDL Model)* | ||
+ | ### Example: PCI(e) | ||
+ | #### Parallel vs. Serial I/O Buses | ||
## I/O Data Format Change | ## I/O Data Format Change | ||
## Error Control | ## Error Control |
Revision as of 16:25, 25 April 2011
- The General Purpose Machine
- User's View
- Programmer's View
- Architect's View
- Logic Designer's View
- Machines, Machine Languages and Digital Logic
- Classification of Computers
- Instruction Sets
- Introduction of the SRC (Simple RISC Computer)
- Using RTN (Register Transfer Notation)
- Addressing Modes
- Hardware Implications of RTN
- Processor Design
- Design Process
- SRC 1-Bus Microarchitecture
- Data Paths
- Logic Design
- Control
- Multiple-Bus Designs
- Reset
- Design Expectations
- Memory System Design
- Components of the Memory System
- RAM Structure
- Memory Modules
- Two-Level Hierarchy
- Cache
- Virtual Memory
- Memory Subsystem in the Computer
- Input/Output
- I/O Subsystems Overview
- Programmed I/O
- General Principles
- Example: Programmed I/O on the SRC*
- Interrupt-Driven I/O
- DMA (Direct Memory Access)
- General Principles
- Example: DMA Engine for the SRC (w/VHDL Model)*
- Example: PCI(e)
- Parallel vs. Serial I/O Buses
- I/O Data Format Change
- Error Control
- Advanced Topics
- Pipelining
- General Principles
- Example: Pipelined SRC (w/VHDL Model)*
- Instruction Level Parallelism
- Superscalar Processors
- General Principles
- Example: Intel Pentium (1st Superscalar X86 CPU)
- Example: AMD K7 (9-issue, Speculative Out-of-Order Execution, etc.)
- VLIW Machines
- General Principles
- Example: IBM VLIW Prototype
- Example: Intel Itanium/EPIC
- Superscalar Processors
- Microprogramming
- General Principles
- Example: Microprogrammed SRC (w/VHDL Model)*
- Code Morphing
- Example: Transmeta Crusoe
- Extending the Address Space
- 16- to 32-bit: Intel 80386
- 32- to 64-bit: AMD Hammer vs Intel Itanium
- Multicore CPUs
- Example: Intel i7-980X
- Pipelining