Difference between revisions of "Lecture Notes"
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File:NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf|NVIDIA FERMI | File:NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf|NVIDIA FERMI | ||
File:Basic_principles.pdf|Video Chapter | File:Basic_principles.pdf|Video Chapter | ||
+ | File:2-Bit_Flash_ADC.png|2-Bit Pipelined Flash ADC | ||
</gallery> | </gallery> | ||
Revision as of 15:00, 29 October 2015
- Microprogrammed SRC Control Unit.pdf
Microprogrammed SRC
- Microcodedsrcvhdl.zip
One-Bus Microcoded SRC VHDL
The First 16-bit X86 CPU with Memory Management and Protected Mode: The Intel 80286
The First 32-bit X86 CPU: The Intel 80386
The First Tightly Pipelined X86 CPU: The Intel 80486
The First Superscalar X86 CPU: The Intel P5
The First 64-bit X86 CPU: The AMD Opteron
Original AMD Athlon on Wikipedia
The Father of VLIW: Josh Fisher
Intel's First VLIW CPU (Failure): The i860
HP TC 1000 Crusoe-Based Tablet PC
Thread (Computing) on Wikipedia
Simultaneous Multithreading on Wikipedia
SPARC T1 "Multi-threaded" CPU on Wikipedia
SPARC T3 "Multi-threaded" CPU on Wikipedia
History of Supercomputing on Wikipedia
Cluster Computing on Wikipedia
Hennessy and Patterson on the Intel i7
- Multimastersrcvhdl.zip
Multi-Master SRC VHDL
- 2-Bit Flash ADC.png
2-Bit Pipelined Flash ADC