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| − | <gallery caption="Introduction">
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| − | File:Day 1.pdf|Introduction
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| − | File:CSDA2eErrata012406.pdf|Errata
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| − | File:AppACSDA.pdf|Appendix A
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| − | File:AppCCSDA.pdf|Appendix C
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| − | File:reference sheets.pdf|SRC Reference
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| − | </gallery>
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| | | | |
| − | <gallery caption="Chapter 1">
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| − | File:Ch1CSDA.pdf|Chapter 1
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| − | </gallery>
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| − |
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| − | <gallery caption="Chapter 2">
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| − | File:Ch2CSDA.pdf|Chapter 2
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| − | File:SRC_RTN.pdf|SRC RTN
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| − | </gallery>
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| − |
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| − | <gallery caption="Chapter 3">
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| − | File:Ch3CSDA.pdf|Chapter 3
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| − | </gallery>
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| − |
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| − | <gallery caption="Chapter 4">
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| − | File:Ch4WDR.pdf|Chapter 4
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| − | File:1-Bus Block Diagrams.pdf|One-Bus SRC Block Diagrams
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| − | File:1busrtn.pdf|One-Bus SRC RTN
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| − | File:srcvhdl.zip|One-Bus SRC VHDL
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| − | File:SRC_VHDL_Tutorial.pdf|SRC VHDL Tutorial
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| − | File:Ug364.pdf|Xilinx Virtex 6 Configurable Logic Block User Guide
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| − | File:SRCUCF.pdf|SRC User Constraint File
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| − | File:SRCSYR.pdf|SRC Synthesis Report
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| − | File:SRCPAR.pdf|SRC Place-and-Route Report
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| − | File:SRCPIN.pdf|SRC Pinout Report
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| − | File:SRCTWR.pdf|SRC Timing (Trace) Report
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| − | File:SRCDATASHEET.pdf|SRC Datasheet
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| − | File:SRC_DCM_VHDL.pdf|One-Bus SRC with DCM VHDL
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| − | File:SRCDCMDATASHEET.pdf|SRC with DCM Datasheet
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| − | File:1-Mux Block Diagrams.pdf|One-Mux SRC Block Diagrams
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| − | File:Two Bus SRC.pdf|Two-Bus SRC
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| − | File:3_Bus_Block_Diagrams.pdf|Three-Bus SRC
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| − | File:Standard_Cell.JPG|Standard Cell SRC?
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| − | </gallery>
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| − |
| |
| − | <gallery caption="Chapter 5">
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| − | File:Ch5CSDA.pdf|Chapter 5
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| − | File:Table_5P1.pdf|Table 5.1
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| − | File:Corrected_Figure_5.15.pdf|Corrected Figure 5.15
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| − | File:Pipelined SRC.pdf|Pipelined SRC
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| − | File:src.pdf|Pipelined SRC VHDL Source (Instructor Only)
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| − | File:Microprogrammed SRC Control Unit.pdf|Microprogrammed SRC
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| − | File:Control.pdf|Microprogrammed SRC Control
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| − | File:Controlstore.pdf|Microprogrammed SRC Control Store
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| − | File:Microcodedsrcvhdl.zip|One-Bus Microcoded SRC VHDL
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| − | File:Windows_Version_History.pdf | Microsoft Windows (TM) Version History
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| − | File:Windows_for_Workgroups_Version_History.pdf | Microsoft Windows for Workgroups(TM) Version History
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| − | File:k7pres.pdf|AMD K7 Presentation
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| − | File:MPF_Hammer_Presentation.pdf|AMD Hammer Presentation
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| − | File:VLIW.pdf|VLIW Notes
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| − | File:Fisher_Paper_1.pdf|Fisher Paper 1
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| − | File:Fisher_Paper_2.pdf|Fisher Paper 2
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| − | File:Itanium.ua_ovw.pdf|Intel Itanium
| |
| − | File:Itanium-architecture-vol-1-2-3-4-reference-set-manual.pdf|Intel Itanium Software Developer's Guide
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| − | File:paper_aklaiber_19jan00.pdf|Transmeta Crusoe White Paper
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| − | File:Transmeta_Laptop.pdf|HP Transmeta Crusoe Laptop
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| − | File:Intel_PII_System.JPG|Intel PII System
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| − | File:29054901-1.pdf|Intel 440FX Chipset
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| − | File:29056402.pdf|Intel 440LX Chipset
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| − | File:Intel_Core_i7-980X_Product_Brief.pdf|Intel Core I7-980X Product Brief
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| − | File:I7-980X_Diemap.jpg|Intel Core I7-980X Diemap
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| − | File:Papamarcos.isca84.pdf|Illinois Protocol
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| − | File:Hyperthreaded_SRC_Concept.pdf|Hyper-Threaded SRC Concept
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| − | File:O13-024-sparc-t5-architecture-1920540.pdf|SPARC T5
| |
| − | File:High-performance-xeon-phi-coprocessor-brief.pdf|Intel Xeon Phi
| |
| − | File:Expressing_Parallelism.pdf| Expressing Parallelism
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| − | File:Where_To_Go_From_Here.pdf| Where to Go From Here
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| − | File:CPU_History.pdf|CPU History
| |
| − | </gallery>
| |
| − | [http://en.wikipedia.org/wiki/Intel_Pentium_4 Intel P4 Netburst CPU]
| |
| − |
| |
| − | [http://en.wikipedia.org/wiki/Microcode Microcode]
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| − |
| |
| − | [http://en.m.wikipedia.org/wiki/Intel_80286 The First 16-bit X86 CPU with Memory Management and Protected Mode: The Intel 80286]
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| − |
| |
| − | [http://en.m.wikipedia.org/wiki/Intel_80386 The First 32-bit X86 CPU: The Intel 80386]
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| − |
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| − | [http://en.m.wikipedia.org/wiki/Intel_80486 The First Tightly Pipelined X86 CPU: The Intel 80486]
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| − |
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| − | [http://en.wikipedia.org/wiki/Intel_P5 The First Superscalar X86 CPU: The Intel P5]
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| − |
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| − | [http://en.m.wikipedia.org/wiki/Opteron The First 64-bit X86 CPU: The AMD Opteron]
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| − |
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| − | [http://www.en.wikipedia.org/wiki/Athlon Original AMD Athlon on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/VLIW VLIW on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/Josh_Fisher The Father of VLIW: Josh Fisher]
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| − |
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| − | [http://www.research.ibm.com/vliw/ VLIW at IBM]
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| − |
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| − | [http://www.research.ibm.com/vliw/Images/alltree.gif VLIW Tree-Instruction Example]
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| − |
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| − | [http://en.wikipedia.org/wiki/Intel_i860 Intel's First VLIW CPU (Failure): The i860]
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| − |
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| − | [http://www.en.wikipedia.org/wiki/Itanium Intel Itanium]
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| − |
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| − | [http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&taskId=120&prodSeriesId=307008&prodTypeId=321957&objectID=c00351475 HP TC 1000 Crusoe-Based Tablet PC]
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| − |
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| − | [http://en.wikipedia.org/wiki/Symmetric_multiprocessing SMP on Wikipedia]
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| − |
| |
| − | [http://en.wikipedia.org/wiki/Cache_coherence Cache Coherence on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/Thread_(computing) Thread (Computing) on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/Simultaneous_multithreading Simultaneous Multithreading on Wikipedia]
| |
| − |
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| − | [http://en.wikipedia.org/wiki/Hyperthreading Hyper-Threading on Wikipedia]
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| − |
| |
| − | [http://en.wikipedia.org/wiki/UltraSPARC_T1 SPARC T1 "Multi-threaded" CPU on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/SPARC_T3 SPARC T3 "Multi-threaded" CPU on Wikipedia]
| |
| − |
| |
| − | [http://en.wikipedia.org/wiki/History_of_supercomputing History of Supercomputing on Wikipedia]
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| − |
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| − | [http://en.wikipedia.org/wiki/Cluster_%28computing%29 Cluster Computing on Wikipedia]
| |
| − |
| |
| − | [http://www.intel.com/content/www/us/en/processors/xeon/xeon-phi-detail.html Intel Xeon Phi]
| |
| − |
| |
| − | <gallery caption="Chapter 6">
| |
| − | File:Ch6CSDA.pdf|Chapter 6
| |
| − | File:Carry Lookahead.pdf|Supplement 1
| |
| − | File:Chapter 6 Math Lectures.pdf|Supplement 2
| |
| − | File:Multiplication.pdf|Supplement 3
| |
| − | </gallery>
| |
| − |
| |
| − | <gallery caption="Chapter 7">
| |
| − | File:Ch7CSDA.pdf|Chapter 7
| |
| − | File:EPROM_Example.pdf|SRC EPROM Example
| |
| − | File:EPROM Example.sch|ExpressPCB
| |
| − | File:SRAM Example.pdf|SRC SRAM Example
| |
| − | File:DRAM_Example_Datapath.pdf|DRAM Example Datapath
| |
| − | File:DRAM_Moore_Example.pdf|SRC DRAM (Moore FSM) Example
| |
| − | File:DRAM Example.pdf|SRC DRAM (Mealy FSM) Example
| |
| − | File:DRAM Example Refresh.pdf|SRC DRAM Example W/Refresh (Mealy FSM)
| |
| − | File:Cache Example.pdf|SRC Cache Example
| |
| − | File:VIRTUAL_MEMORY.pdf|Virtual Memory Concepts
| |
| − | </gallery>
| |
| − |
| |
| − | [http://www.edn.com/design/systems-design/4399725/Memory-Hierarchy-Design---Part-6--The-Intel-Core-i7 Hennessy and Patterson on the Intel i7]
| |
| − |
| |
| − | [http://www.tomshardware.com/reviews/Intel-i7-nehalem-cpu,2041-10.html Intel i7 Cache Article]
| |
| − |
| |
| − | <gallery caption="Chapter 8">
| |
| − | File:Ch8CSDA.pdf|Chapter 8
| |
| − | File:stereo.pdf|Stereo Card Example
| |
| − | File:stereo.zip|Stereo Card VHDL
| |
| − | File:IN OUT RTN.pdf|IN & OUT RTN
| |
| − | File:Metastability Lecture.pdf|Metastability Lecture
| |
| − | File:Paper1.pdf|Metastability 1
| |
| − | File:Paper2.pdf|Metastability 2
| |
| − | File:multimastersrcvhdl.zip|Multi-Master SRC VHDL
| |
| − | File:stereomaster.zip|Bus-Master Stereo SRC Audio Card VHDL
| |
| − | File:THREE-SLOT_MULTI-MASTER_SRC_MOTHERBOARD.pdf|THREE-SLOT MULTI-MASTER SRC MOTHERBOARD
| |
| − | File:PCI Lecture.pdf|PCI
| |
| − | File:X86_Chipset_Evolution.pdf|Intel PCI Chipset Evolution
| |
| − | File:Reflection Lecture.pdf|Parallel vs. Serial Buses
| |
| − | File:Reflection_Example.pdf|Reflection Example
| |
| − | File:PCIe Lecture.pdf|PCIe
| |
| − | File:Coding Theory 001.pdf|Coding Theory 001
| |
| − | File:Hamming Code Example With Odd Parity.pdf|Hamming Codes
| |
| − | File:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Example
| |
| − | </gallery>
| |
| − | [http://www.retroarchive.org/dos/docs/ibm5160techref.pdf IBM 5160 Technical Reference]
| |
| − |
| |
| − | <gallery caption="Chapter 9">
| |
| − | File:Ch9CSDA.pdf|Chapter 9
| |
| − | File:NTSC Video.pdf|NTSC Video
| |
| − | File:Video Example.pdf|Video Example
| |
| − | File:NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf|NVIDIA FERMI
| |
| − | File:Basic_principles.pdf|Video Chapter
| |
| − | </gallery>
| |
| − |
| |
| − | <gallery caption="Chapter 10">
| |
| − | File:Ch10CSDA.pdf|Chapter 10
| |
| − | File:RS232 Examples.pdf|RS232 Examples
| |
| − | File:MAX220-MAX249.pdf|MAX232 IC
| |
| − | File:DS92LV16.pdf|National DS92LV16 SERDES
| |
| − | File:usb_20.pdf|USB 2.0
| |
| − | File:EVERYTHING YOU ALWAYS WANTED.PDF|VHDL Lecture
| |
| − | </gallery>
| |
