Difference between revisions of "Lecture Notes"
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File:MPF_Hammer_Presentation.pdf|AMD Hammer Presentation | File:MPF_Hammer_Presentation.pdf|AMD Hammer Presentation | ||
File:VLIW.pdf|VLIW Notes | File:VLIW.pdf|VLIW Notes | ||
+ | File:Fisher_Paper_1.pdf|Fisher Paper 1 | ||
+ | File:Fisher_Paper_2.pdf|Fisher Paper 2 | ||
File:Itanium.ua_ovw.pdf|Intel Itanium | File:Itanium.ua_ovw.pdf|Intel Itanium | ||
File:Itanium-architecture-vol-1-2-3-4-reference-set-manual.pdf|Intel Itanium Software Developer's Guide | File:Itanium-architecture-vol-1-2-3-4-reference-set-manual.pdf|Intel Itanium Software Developer's Guide |
Revision as of 16:49, 20 November 2014
- Microprogrammed SRC Control Unit.pdf
Microprogrammed SRC
- Microcodedsrcvhdl.zip
One-Bus Microcoded SRC VHDL
The First 16-bit X86 CPU with Memory Management and Protected Mode: The Intel 80286
The First 32-bit X86 CPU: The Intel 80386
The First Tightly Pipelined X86 CPU: The Intel 80486
The First Superscalar X86 CPU: The Intel P5
The First 64-bit X86 CPU: The AMD Opteron
Original AMD Athlon on Wikipedia
The Father of VLIW: Josh Fisher
Intel's First VLIW CPU (Failure): The i860
HP TC 1000 Crusoe-Based Tablet PC
Thread (Computing) on Wikipedia
Simultaneous Multithreading on Wikipedia
SPARC T1 "Multi-threaded" CPU on Wikipedia
SPARC T3 "Multi-threaded" CPU on Wikipedia
History of Supercomputing on Wikipedia
Cluster Computing on Wikipedia
Hennessy and Patterson on the Intel i7
- Multimastersrcvhdl.zip
Multi-Master SRC VHDL