Syllabus

1. The General Purpose Machine
   1. User's View
   2. Programmer's View
   3. Architect's View
   4. Logic Designer's View
2. Machines, Machine Languages and Digital Logic
   1. Classification of Computers
   2. Instruction Sets
   3. Introduction of the SRC (Simple RISC Computer)
   4. Using RTN (Register Transfer Notation)
   5. Addressing Modes
   6. Hardware Implications of RTN
3. Processor Design
   1. Design Process
   2. SRC 1-Bus Microarchitecture
   3. Data Paths
   4. Logic Design
   5. Control
   6. Multiple-Bus Designs
   7. Reset
   8. Design Expectations
4. Memory System Design
   1. Components of the Memory System
   2. RAM Structure
   3. Memory Modules
   4. Two-Level Hierarchy
   5. Cache
   6. Virtual Memory
   7. Memory Subsystem in the Computer
5. Input/Output
   1. I/O Subsystems
   2. Programmed I/O
   3. Interrupts
   4. DMA (Direct Memory Access)
   5. I/O Data Format Change
   6. Error Control
6. Advanced Topics
   1. Pipelining
      1. General Principles
      2. Pipelined SRC (w/VHDL Model)
   2. Instruction Level Parallelism
      1. Superscalar Processors
         1. General Principles
         2. AMD K7
      2. VLIW Machines
         1. General Principles
         2. IBM VLIW Prototype
   3. Microprogramming
      1. General Principles
      2. Microprogrammed SRC (w/VHDL Model)
   4. Code Morphing
      1. Transmeta Crusoe