Difference between revisions of "Lecture Notes"
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File:Microcodedsrcvhdl.zip|One-Bus Microcoded SRC VHDL | File:Microcodedsrcvhdl.zip|One-Bus Microcoded SRC VHDL | ||
File:Intel_Core_i7-980X_Product_Brief.pdf|Intel Core I7-980X Product Brief | File:Intel_Core_i7-980X_Product_Brief.pdf|Intel Core I7-980X Product Brief | ||
− | File:I7- | + | File:I7-980X_Diemap.jpg|Intel Core I7-980X Diemap |
</gallery> | </gallery> | ||
[http://en.wikipedia.org/wiki/Intel_P5 The First Superscalar X86 CPU: The P5] | [http://en.wikipedia.org/wiki/Intel_P5 The First Superscalar X86 CPU: The P5] |
Revision as of 15:13, 7 December 2010
- Testbench.pdf
One-Bus SRC Simulation
- Synthesis Report.pdf
XC3S500E-4 SRC Synthesis Report
- Place&Route.pdf
XC3S500E-4 SRC Place and Route Report
- Timing Report.pdf
XC3S500E-4 SRC Timing Report
- Microprogrammed SRC Control Unit.pdf
Microprogrammed SRC
- Microcodedsrcvhdl.zip
One-Bus Microcoded SRC VHDL
The First Superscalar X86 CPU: The P5
Original AMD Athlon on Wikipedia
HP TC 1000 Crusoe-Based Tablet PC
- Eprom Example.pdf
SRC EPROM Example
- Multimastersrcvhdl.zip
Multi-Master SRC VHDL
- State Equal Output Moore Example.pdf
State Equal Output Moore Example