Difference between revisions of "Lecture Notes"
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<gallery caption="Chapter 4"> | <gallery caption="Chapter 4"> | ||
File:Ch4WDR.pdf|Chapter 4 | File:Ch4WDR.pdf|Chapter 4 | ||
+ | File:DISPLACEMENT.pdf|Displacement-Based Addressing | ||
File:1-Bus Block Diagrams.pdf|One-Bus SRC Block Diagrams | File:1-Bus Block Diagrams.pdf|One-Bus SRC Block Diagrams | ||
File:1busrtn.pdf|One-Bus SRC RTN | File:1busrtn.pdf|One-Bus SRC RTN |
Revision as of 20:43, 18 September 2015
- Microprogrammed SRC Control Unit.pdf
Microprogrammed SRC
- Microcodedsrcvhdl.zip
One-Bus Microcoded SRC VHDL
The First 16-bit X86 CPU with Memory Management and Protected Mode: The Intel 80286
The First 32-bit X86 CPU: The Intel 80386
The First Tightly Pipelined X86 CPU: The Intel 80486
The First Superscalar X86 CPU: The Intel P5
The First 64-bit X86 CPU: The AMD Opteron
Original AMD Athlon on Wikipedia
The Father of VLIW: Josh Fisher
Intel's First VLIW CPU (Failure): The i860
HP TC 1000 Crusoe-Based Tablet PC
Thread (Computing) on Wikipedia
Simultaneous Multithreading on Wikipedia
SPARC T1 "Multi-threaded" CPU on Wikipedia
SPARC T3 "Multi-threaded" CPU on Wikipedia
History of Supercomputing on Wikipedia
Cluster Computing on Wikipedia
Hennessy and Patterson on the Intel i7
- Multimastersrcvhdl.zip
Multi-Master SRC VHDL