Difference between revisions of "Lecture Notes"

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File:SRC_Cache_Datapath.pdf|SRC Cache Datapath
 
File:SRC_Cache_Datapath.pdf|SRC Cache Datapath
 
File:VIRTUAL_MEMORY.pdf|Virtual Memory Concepts
 
File:VIRTUAL_MEMORY.pdf|Virtual Memory Concepts
 +
File:MC68851.pdf|Motorola MC68851 MMU
 
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Revision as of 15:14, 25 October 2016

Intel P4 Netburst CPU

Microcode

The Intel 8086/8088: The Original IBM PC CPU

The First 16-bit X86 CPU with Memory Management and Protected Mode: The Intel 80286

The First 32-bit X86 CPU: The Intel 80386

The First Tightly Pipelined X86 CPU: The Intel 80486

Superscalar CPU History

The First Superscalar X86 CPU: The Intel P5

The First 64-bit X86 CPU: The AMD Opteron

Original AMD Athlon on Wikipedia

VLIW on Wikipedia

The Father of VLIW: Josh Fisher

Multiflow

VLIW at IBM

VLIW Tree-Instruction Example

Intel's First VLIW CPU (Failure): The i860

Itanium

How the Itanium Killed the Computer Industry

HP and Intel Effectively Kill off Itanium

HP TC 1000 Crusoe-Based Tablet PC

SMP on Wikipedia

Cache Coherence on Wikipedia

Mark Papmarcos on Linkedin

Thread (Computing) on Wikipedia

Simultaneous Multithreading on Wikipedia

Hyper-Threading on Wikipedia

SPARC T1 "Multi-threaded" CPU on Wikipedia

SPARC T3 "Multi-threaded" CPU on Wikipedia

Implementing Scalable Atomic Locks for Multi-Core Intel® EM64T and IA32 Architectures

History of Supercomputing on Wikipedia

Cluster Computing on Wikipedia

Intel Xeon Phi

Hennessy and Patterson on the Intel i7

Intel i7 Cache Article