Difference between revisions of "Lecture Notes"
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*[[media:AD9764.pdf|Example 14-bit 125 Msample/s Current Output DAC]] | *[[media:AD9764.pdf|Example 14-bit 125 Msample/s Current Output DAC]] | ||
*[[media:LTC2000_DAC.pdf|Example 16-bit 2.5 Gsample/s Current Output DAC]] | *[[media:LTC2000_DAC.pdf|Example 16-bit 2.5 Gsample/s Current Output DAC]] | ||
+ | *[[media:Adc12j4000.pdf|Example 12-bit 4 Gs/s ADC]] | ||
*[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | *[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | ||
*[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]] | *[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]] |
Revision as of 18:59, 22 January 2015
- Course Introduction
- Use Advanced PCB Technology to Produce 50% Smaller Product Designs
- Reflection Lecture
- Maximum ExpressPCB Trace Impedance
- LVDS Fundamentals
- R-2R DAC Circuit
- R-2R DAC SPICE DECK
- R-2R DAC Simulation
- Understanding Flash ADCs
- Fermilab ADC/TDC in FPGA Paper
- Analog Ramp Generator
- Altera Delta-Sigma ADC in FPGA Paper
- Xilinx Modified Delta-Sigma ADC in FPGA Paper
- Lattice Semiconductor ADC White Paper
- Successive Approximation ADC in FPGA Paper
- Example 8-bit 210 Msample/s Current Output DAC
- Example 14-bit 125 Msample/s Current Output DAC
- Example 16-bit 2.5 Gsample/s Current Output DAC
- Example 12-bit 4 Gs/s ADC
- VHDL Lecture
- State Equal Output Moore Machine Example
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
- IEEE Code of Ethics
- Employment Contract
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