Difference between revisions of "Syllabus"

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(Replaced content with "#Chaper 1 ##1.1 ##1.2 ##1.3 ###1.3.1 ###1.3.2 ###1.3.3 ###1.3.4 #Chapter 2")
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#Chaper 1
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#Digital Systems and Information
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##1.1
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##Number Systems
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##1.2
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##Base Conversion
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##1.3
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##Arithmetic Operations
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###1.3.1
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##Codes
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###1.3.2
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#Combinational Logic Circuits
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###1.3.3
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##Logic Gates
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###1.3.4
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##Boolean Algebra
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#Chapter 2
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##K-Maps
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##Sum of Products
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##Product of Sums
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##VHDL Representations
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#Combinational Logic Design
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##Hierarchical Design Concepts
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##Decoders/Encoders
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##Multiplexers
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##Binary Adders
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##Subtraction/2s Complement
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##Multiplication
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##Division
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#Sequential Circuits
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##Latches
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##Flip-Flops
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##State Diagrams
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##Finite-State Machine Synthesis
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##VHDL Representations
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#Digital Hardware Representation
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##CMOS
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##PALs/PLAs
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##FPGAs
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#Register Transfer (Primarily VHDL Representations)

Revision as of 15:19, 13 April 2016

  1. Digital Systems and Information
    1. Number Systems
    2. Base Conversion
    3. Arithmetic Operations
    4. Codes
  2. Combinational Logic Circuits
    1. Logic Gates
    2. Boolean Algebra
    3. K-Maps
    4. Sum of Products
    5. Product of Sums
    6. VHDL Representations
  3. Combinational Logic Design
    1. Hierarchical Design Concepts
    2. Decoders/Encoders
    3. Multiplexers
    4. Binary Adders
    5. Subtraction/2s Complement
    6. Multiplication
    7. Division
  4. Sequential Circuits
    1. Latches
    2. Flip-Flops
    3. State Diagrams
    4. Finite-State Machine Synthesis
    5. VHDL Representations
  5. Digital Hardware Representation
    1. CMOS
    2. PALs/PLAs
    3. FPGAs
  6. Register Transfer (Primarily VHDL Representations)
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