Difference between revisions of "Lecture Notes"
From CSE260M Wiki
Jump to navigationJump to search| Line 23: | Line 23: | ||
*[[media:ug382.pdf|Spartan 6 FPGA Clocking Resources User Guide]] | *[[media:ug382.pdf|Spartan 6 FPGA Clocking Resources User Guide]] | ||
*[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | *[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | ||
| + | *[[media:Simulation_Tutorial.pdf|Xilinx ISE Simulation Tutorial]] | ||
*[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]] | *[[media:State_Equal_Output_Moore_Example_Fixed.pdf|State Equal Output Moore Machine Example]] | ||
*[[media:Metastability 1.pdf|Anomalous Behavior of Synchronizer and Arbiter Circuits]] | *[[media:Metastability 1.pdf|Anomalous Behavior of Synchronizer and Arbiter Circuits]] | ||
Revision as of 22:19, 10 February 2015
- Course Introduction
- Use Advanced PCB Technology to Produce 50% Smaller Product Designs
- Reflection Lecture
- Maximum ExpressPCB Trace Impedance
- LVDS Fundamentals
- R-2R DAC Circuit
- R-2R DAC SPICE DECK
- R-2R DAC Simulation
- Understanding Flash ADCs
- Fermilab ADC/TDC in FPGA Paper
- Analog Ramp Generator
- Altera Delta-Sigma ADC in FPGA Paper
- Xilinx Modified Delta-Sigma ADC in FPGA Paper
- Lattice Semiconductor ADC White Paper
- Successive Approximation ADC in FPGA Paper
- Modified Delta-Sigma SPICE Model
- Example 8-bit 210 Msample/s Current Output DAC
- Example 14-bit 125 Msample/s Current Output DAC
- Example 16-bit 2.5 Gsample/s Current Output DAC
- Example 12-bit 4 Gs/s ADC
- Oscillators and Clock Distribution
- Lumped Lecture
- Spartan 6 FPGA Clocking Resources User Guide
- VHDL Lecture
- Xilinx ISE Simulation Tutorial
- State Equal Output Moore Machine Example
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
- IEEE Code of Ethics
- Employment Contract
Links:
