Difference between revisions of "Lecture Notes"
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*[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | *[[media:EVERYTHING_YOU_ALWAYS_WANTED.pdf|VHDL Lecture]] | ||
*[[media:State_Equal_Output_Moore_Example.pdf|State Equal Output Moore Machine Example]] | *[[media:State_Equal_Output_Moore_Example.pdf|State Equal Output Moore Machine Example]] | ||
Revision as of 17:50, 31 December 2013
- VHDL Lecture
- State Equal Output Moore Machine Example
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
- VHDL Lecture
- CPLD Timing 1
- CPLD Timing 2
- Metastability 1
- Metastability 2
- IEEE Code of Ethics
- Employment Contract
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