Difference between revisions of "Syllabus"
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|SEPT 11 | |SEPT 11 | ||
|Essential Prime Implicants and Optimized Expressions<br />Standard Forms: SOP Notation<br />Five- and Six-Variable K-Maps<br />Don’t cares<br />Gate propagation delay<br />The Mux<br />The Decoder<br />Implementing Circuits Using Muxes | |Essential Prime Implicants and Optimized Expressions<br />Standard Forms: SOP Notation<br />Five- and Six-Variable K-Maps<br />Don’t cares<br />Gate propagation delay<br />The Mux<br />The Decoder<br />Implementing Circuits Using Muxes | ||
− | |Chapter 2 | + | |Chapter 2<br />Chapter 3 |
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|SEPT 13 | |SEPT 13 | ||
|Standard Cell Implementation of Logic Circuits<br />VHDL Tutorial<br />VHDL Constructs: IF, WHEN, SELECT<br />Vivado Simulation Tutorial<br />Boole's Expansion Theorem (First Pass) | |Standard Cell Implementation of Logic Circuits<br />VHDL Tutorial<br />VHDL Constructs: IF, WHEN, SELECT<br />Vivado Simulation Tutorial<br />Boole's Expansion Theorem (First Pass) | ||
− | |Chapter | + | |Chapter 3 |
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Revision as of 14:10, 9 May 2017
LECTURE | DATE | MATERIAL | PREPARATION |
1 | AUG 28 | Course Introduction Number Systems Base Conversion Arithmetic Operations Codes |
Chapter 1 |
2 | AUG 30 | Boolean Algebra The Consensus Theorem Introduction to K-Maps |
Chapter 2 |
3 | SEPT 6 | Standard Forms: POS Notation Two-Level Circuit Optimization Using K-Maps Proving Identities Using K-Maps The XOR Gate The Half Adder The Full Adder The Ripple-Carry Adder |
Chapter 2 |
4 | SEPT 11 | Essential Prime Implicants and Optimized Expressions Standard Forms: SOP Notation Five- and Six-Variable K-Maps Don’t cares Gate propagation delay The Mux The Decoder Implementing Circuits Using Muxes |
Chapter 2 Chapter 3 |
5 | SEPT 13 | Standard Cell Implementation of Logic Circuits VHDL Tutorial VHDL Constructs: IF, WHEN, SELECT Vivado Simulation Tutorial Boole's Expansion Theorem (First Pass) |
Chapter 3 |