Difference between revisions of "Lecture Notes"
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*[[media:PID4703951.pdf|Using Babbage's Difference Engine to Introduce Computer Architecture]] | *[[media:PID4703951.pdf|Using Babbage's Difference Engine to Introduce Computer Architecture]] | ||
*[[media:The_Really_Simple_RISC_Computer.pdf|The Really Simple RISC Computer (RSRC)]] | *[[media:The_Really_Simple_RISC_Computer.pdf|The Really Simple RISC Computer (RSRC)]] | ||
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*[[media:RSRC_CONTROL_VHDL.pdf|---RSRC CONTROL.VHD (Instructor Only)]] | *[[media:RSRC_CONTROL_VHDL.pdf|---RSRC CONTROL.VHD (Instructor Only)]] | ||
*[[media:ALU.pdf|---RSRC ALU.VHD (Instructor Only)]] | *[[media:ALU.pdf|---RSRC ALU.VHD (Instructor Only)]] | ||
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*[[media:RSRC.pdf|---RSRC.VHD (Instructor Only)]] | *[[media:RSRC.pdf|---RSRC.VHD (Instructor Only)]] | ||
*[[media:TESTBENCH.pdf|---RSRC TESTBENCH.VHD (Instructor Only)]] | *[[media:TESTBENCH.pdf|---RSRC TESTBENCH.VHD (Instructor Only)]] | ||
| − | *[[media:DISPLACEMENT.pdf| | + | *[[media:RSRC_Abstract_RTN.pdf|RSRC Abstract RTN]] |
| + | *[[media:RSRC_4KB_Sync_SRAM.pdf|1Kx32 RSRC Memory Subsystem]] | ||
| + | *[[media:DISPLACEMENT.pdf|RSRC/SRC Displacement-Based Addressing]] | ||
*[[media:SRC_Material.pdf|SRC Documentation]] | *[[media:SRC_Material.pdf|SRC Documentation]] | ||
Revision as of 14:05, 18 April 2017
- Course Introduction
- Chapter 1
- -----The Reflected Binary (Gray) Code
- Chapter 2
- Chapter 3
- -----Synthesizable VHDL (2016 Version)
- -----Vivado Simulation Tutorial 1
- -----Vivado Simulation Tutorial 2 (Forcing a Clock)
- -----Full Vivado Tutorial (John MacKay)
- -----Boole's Expansion Theorem
- Chapter 4
- -----NOR SR Latch
- -----First Counter
- -----Second Counter
- -----Oscillators and Clock Distribution
- -----Definitions and Theorems for Sequential Machines
- -----Minimizing Completely Specified Machines
- Chapter 5
- Chapter 6
- Using Babbage's Difference Engine to Introduce Computer Architecture
- The Really Simple RISC Computer (RSRC)
- ---RSRC CONTROL.VHD (Instructor Only)
- ---RSRC ALU.VHD (Instructor Only)
- ---RSRC EPROM.VHD (Instructor Only)
- ---RSRC SRAM.VHD (Instructor Only)
- ---RSRC.VHD (Instructor Only)
- ---RSRC TESTBENCH.VHD (Instructor Only)
- RSRC Abstract RTN
- 1Kx32 RSRC Memory Subsystem
- RSRC/SRC Displacement-Based Addressing
- SRC Documentation
- Chapter 7
- Chapter 8
- Chapter 9
- Chapter 10
- Chapter 11
- Chapter 12
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
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