Difference between revisions of "General Information"
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Text: Logic and Computer Design Fundamentals (5th Edition), Mano/Kim/Martin, Prentice Hall, 2016, ISBN 0-13-376063-4. | Text: Logic and Computer Design Fundamentals (5th Edition), Mano/Kim/Martin, Prentice Hall, 2016, ISBN 0-13-376063-4. | ||
| − | Class Meeting: Mondays and Wednesdays, 2:30 | + | Class Meeting: Mondays and Wednesdays, 1:00 - 2:30 p.m., Location TBD |
| − | Exam #1: | + | Exam #1: TBD |
| − | Exam #2: | + | Exam #2: TBD |
| − | Exam #3: | + | Exam #3: TBD |
| − | Grading: | + | Grading: TBD |
Homework: Homework will be assigned weekly and is optional. Homework turned in at the start of class on the due date will be graded and returned with a representative grade indicated, but scores will not be recorded. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity. | Homework: Homework will be assigned weekly and is optional. Homework turned in at the start of class on the due date will be graded and returned with a representative grade indicated, but scores will not be recorded. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity. | ||
| + | |||
| + | Three laboratories will be assigned during the semester. Laboratories must be done on an individual basis, and students collaborating with or submitting VHDL or bit files done by someone else for grading will be considered to have violated the course policy on academic integrity. | ||
Revision as of 19:44, 12 December 2016
Instructor, William D. Richard, Ph.D., Jolley Hall 538, 314-935-4676, wdr@wustl.edu
Office Hours: Tuesday/Thursday 1:30-3 p.m. or by appointment
Course Web Page: http://classes.engineering.wustl.edu/permanant/cse260m/index.php/Main_Page
Piazza Page: http://piazza.com/wustl/fall2016/cse260m/home
Student Resources Web Page: http://wps.pearsoned.com/ecs_mano_lcdf_5/248/63706/16308896.cw/index.html
Text: Logic and Computer Design Fundamentals (5th Edition), Mano/Kim/Martin, Prentice Hall, 2016, ISBN 0-13-376063-4.
Class Meeting: Mondays and Wednesdays, 1:00 - 2:30 p.m., Location TBD
Exam #1: TBD
Exam #2: TBD
Exam #3: TBD
Grading: TBD
Homework: Homework will be assigned weekly and is optional. Homework turned in at the start of class on the due date will be graded and returned with a representative grade indicated, but scores will not be recorded. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity.
Three laboratories will be assigned during the semester. Laboratories must be done on an individual basis, and students collaborating with or submitting VHDL or bit files done by someone else for grading will be considered to have violated the course policy on academic integrity.
