Difference between revisions of "General Information"

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Instructor, William D. Richard, Ph.D., Bryan Hall 307B, 314-935-4676, wdr@wustl.edu
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<strong>Instructor:</strong> William D. Richard, Ph.D., Jolley Hall 538, 314-935-4676, wdr@wustl.edu
  
Office Hours: Monday and Wednesday, 1:00-2:00 p.m. or by appointment
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<strong>Office Hours:</strong> Tuesday/Thursday 9:00 - 11:00 a.m. or by appointment
  
Course Web Page: http://classes.engineering.wustl.edu/cse462
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<strong>Course Web Page:</strong> http://classes.engineering.wustl.edu/permanant/cse260m/index.php/Main_Page
  
Text: NA (You should have access to a VHDL reference.)
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<strong>Student Resources Web Page:</strong> http://wps.pearsoned.com/ecs_mano_lcdf_5/248/63706/16308896.cw/index.html
  
Class Meeting: Tuesdays and Thursdays, 1:00-2:30 a.m., Lopata Hall Room 103
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<strong>Text:</strong> Logic and Computer Design Fundamentals (5th Edition), Mano/Kim/Martin, Prentice Hall, 2016, ISBN 0-13-376063-4.
  
Mid-term Exam: TBD
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<strong>Class Meeting:</strong> Mondays and Wednesdays, 2:30 - 4:00 p.m., Location: TBD
  
Final Exam: TBD
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<strong>Exam #1:</strong> October 2, 2017
  
Paper Due: TBD
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<strong>Exam #2:</strong> November 6, 2017
  
Project Presentations: TBD
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<strong>Exam #3:</strong> December 6, 2017
  
Grading: Two exams, 30% each.  Project: 30%.  Homework/quizzes are 10%.
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<strong>GRADING:</strong> Exam 1: 30%; Exam 2: 30%; Exam 3: 30%; Labs: 10%
  
Homework: Homework will be assigned weekly.  It will be due one week after it is assigned. Homework will be turned in at the start of class on the due date. No late homework will be accepted. Homework should be done on an individual basis but you may confer with your friends, course consultants, graders, etc.
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{| class="wikitable" style="text-align: center; color: green;"
 +
|SCORE
 +
|GRADE OPTION
 +
|PASS/FAIL OPTION
 +
 
 +
|-
 +
|97
 +
|A+
 +
|rowspan="9"|Pass
 +
 
 +
|-
 +
|93
 +
|A
 +
 
 +
|-
 +
|90
 +
|A-
 +
 
 +
|-
 +
|87
 +
|B+
 +
 
 +
|-
 +
|93
 +
|B
 +
 
 +
|-
 +
|80
 +
|B-
 +
 
 +
|-
 +
|77
 +
|C+
 +
 
 +
|-
 +
|73
 +
|C
 +
 
 +
|-
 +
|70
 +
|C-
 +
 
 +
|-
 +
|60
 +
|D
 +
|rowspan="2"|Fail
 +
 
 +
|-
 +
|0
 +
|F
 +
 
 +
|}
 +
 
 +
<strong>HOMEWORK:</strong> Homework will be assigned weekly and is optional. Homework turned in at the start of class on the due date will be graded and returned with a representative grade indicated, but scores will not be recorded. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity (see below).
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 +
<strong>LABORITORIES:</strong> Three laboratories will be assigned during the semester. Laboratories are required. No late laboratories will be accepted for grading. Laboratories must be done on an individual basis, and students collaborating with or submitting VHDL or bit files done by someone else for grading will be considered to have violated the course policy on academic integrity (see below).
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 +
<strong>ATTENDANCE:</strong> Attendance is required. Students missing seven (7) or more lectures during the semester will be assigned a course grade of "F." Since family and medical emergencies are possible, this should be taken into consideration by students electing to miss classes for "non-emergency" reasons. No exceptions will be made.
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<strong>ACADEMIC INTEGRITY POLICY:</strong> https://wustl.edu/about/compliance-policies/academic-policies/undergraduate-student-academic-integrity-policy/

Latest revision as of 13:47, 16 July 2017

Instructor: William D. Richard, Ph.D., Jolley Hall 538, 314-935-4676, wdr@wustl.edu

Office Hours: Tuesday/Thursday 9:00 - 11:00 a.m. or by appointment

Course Web Page: http://classes.engineering.wustl.edu/permanant/cse260m/index.php/Main_Page

Student Resources Web Page: http://wps.pearsoned.com/ecs_mano_lcdf_5/248/63706/16308896.cw/index.html

Text: Logic and Computer Design Fundamentals (5th Edition), Mano/Kim/Martin, Prentice Hall, 2016, ISBN 0-13-376063-4.

Class Meeting: Mondays and Wednesdays, 2:30 - 4:00 p.m., Location: TBD

Exam #1: October 2, 2017

Exam #2: November 6, 2017

Exam #3: December 6, 2017

GRADING: Exam 1: 30%; Exam 2: 30%; Exam 3: 30%; Labs: 10%

SCORE GRADE OPTION PASS/FAIL OPTION
97 A+ Pass
93 A
90 A-
87 B+
93 B
80 B-
77 C+
73 C
70 C-
60 D Fail
0 F

HOMEWORK: Homework will be assigned weekly and is optional. Homework turned in at the start of class on the due date will be graded and returned with a representative grade indicated, but scores will not be recorded. No late homework will be accepted for grading. Homework solutions will be posted after class on the due date. Homework submitted for grading must be done on an individual basis, and students submitting a copy of work done by someone else for grading will be considered to have violated the course policy on academic integrity (see below).

LABORITORIES: Three laboratories will be assigned during the semester. Laboratories are required. No late laboratories will be accepted for grading. Laboratories must be done on an individual basis, and students collaborating with or submitting VHDL or bit files done by someone else for grading will be considered to have violated the course policy on academic integrity (see below).

ATTENDANCE: Attendance is required. Students missing seven (7) or more lectures during the semester will be assigned a course grade of "F." Since family and medical emergencies are possible, this should be taken into consideration by students electing to miss classes for "non-emergency" reasons. No exceptions will be made.

ACADEMIC INTEGRITY POLICY: https://wustl.edu/about/compliance-policies/academic-policies/undergraduate-student-academic-integrity-policy/