Difference between revisions of "Lecture Notes"
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*[[media:Reflection_Lecture.pdf|Reflection Lecture]] | *[[media:Reflection_Lecture.pdf|Reflection Lecture]] | ||
*[[media:Maximum_ExpressPCB_Trace_Impedance.pdf|Maximum ExpressPCB Trace Impedance]] | *[[media:Maximum_ExpressPCB_Trace_Impedance.pdf|Maximum ExpressPCB Trace Impedance]] | ||
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*[[media:AN-5017.pdf|LVDS Fundamentals]] | *[[media:AN-5017.pdf|LVDS Fundamentals]] | ||
*[[media:R2R_Circuit.pdf|R-2R DAC Circuit]] | *[[media:R2R_Circuit.pdf|R-2R DAC Circuit]] | ||
Revision as of 18:31, 26 January 2016
- Course Introduction
- Use Advanced PCB Technology to Produce 50% Smaller Product Designs
- Reflection Lecture
- Maximum ExpressPCB Trace Impedance
- LVDS Fundamentals
- R-2R DAC Circuit
- R-2R DAC SPICE DECK
- R-2R DAC Simulation
- Understanding Flash ADCs
- Fermilab ADC/TDC in FPGA Paper
- Analog Ramp Generator
- Altera Delta-Sigma ADC in FPGA Paper
- Xilinx Modified Delta-Sigma ADC in FPGA Paper
- Lattice Semiconductor ADC White Paper
- Successive Approximation ADC in FPGA Paper
- Modified Delta-Sigma SPICE Model
- FFT Magnitude
- WDR Test PCB Scope Plots (Instructor Only)
- Manar Filter Output (Instructor Only)
- (Comments on) Recovering the Input Signal
- Example 8-bit 210 Msample/s Current Output DAC
- Example 14-bit 125 Msample/s Current Output DAC
- Example 16-bit 2.5 Gsample/s Current Output DAC
- Example 12-bit 4 Gs/s ADC
- Oscillators and Clock Distribution
- Lumped Lecture
- Spartan 6 FPGA Clocking Resources User Guide
- VHDL Lecture
- Xilinx ISE Simulation Tutorial
- State Equal Output Moore Machine Example
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
- IEEE Code of Ethics
- Employment Contract
Links:
Fourier Transform of a Square Wave]
PCB Trace Impedance Calculator]
