|
|
| (18 intermediate revisions by the same user not shown) |
| Line 1: |
Line 1: |
| − | *[[media:DS_FT2232H.pdf|FTDI FT2232H]] | + | *[[media:Sn74ls04.pdf|74LS04 Datasheet]] |
| − | *[[media:DS_FT2232H_Mini_Module.pdf|FTDI FT2232H Module]] | + | *[[media:Sn74ls74a.pdf|74LS74 Datasheet]] |
| − | *[[media:D2XX_Programmer's_Guide.pdf|FTDI D2XX Programmer's Guide]] | + | *[[media:Am27c256.pdf|AMD 32Kx8 EPROM Datasheet]] |
| − | *[[media:21794G.pdf|Microchip 93LC56 2KB Serial EEPROM]] | + | *[[media:Cy7c199n_8.pdf|Cypress 32Kx8 SRAM]] |
| | + | *[[media:MT4LC4M16R6.pdf|Micron 4Mx16 EDO DRAM]] |
| | | | |
| | | | |
| − | *[[media:Spartan6_Product_Brief.pdf|Xilinx Spartan 6 Product Brief]] | + | *[[media:Ds180_7Series_Overview.pdf|Xilinx 7-Series FPGAs Overview]] |
| − | *[[media:ds160.pdf|Xilinx Spartan 6 LX Family Overview]]
| + | *[[media:Ug474_7Series_CLB.pdf|Xilinx 7-Series CLB User Guide]] |
| − | *[[media:ug383.pdf|Xilinx Spartan 6 Block RAM Resources User Guide]]
| |
| − | *[[media:ds162.pdf|Xilnx Spartan 6 LX Family Switching Characteristics]]
| |
| − | *[[media:ug381.pdf|Xilinx Spartan 6 LX SelectIO Resources]]
| |
| − | *[[media:ug382.pdf|Spartan 6 FPGA Clocking Resources User Guide]]
| |
| − | *[[media:ug385.pdf|Xilinx Spartan 6 FPGA Packaging and Pinouts]]
| |
| − | *[[media:spartan6_hdl.pdf|Xilinx Spartan 6 Libraries Guide for HDL (see page 225)]]
| |
| − | *[[media:wp396_S6_HV_Perf_Power.pdf|Xilinx High-Volume Spartan 6 FPGAs Whitepaper]]
| |
| − | *[[media:wp420-DDR3-SI-PCB.pdf|Xilinx Virtex 6/Spartan 6 DDR3/PCB Whitepaper]] | |
| − | *[[media:pg140-cic-compiler.pdf|Xilinx LogiCORE IP CIC Compiler V4.0]]
| |
| − | *[[media:cgd.pdf| ISE V10 Constraints Guide (see page 206)]]
| |
| | | | |
| | | | |
| − | *[[media:Ds312.pdf|Xilinx Spartan 3E Datasheet (Timing on page 125)]] | + | *[[media:Ug903-vivado-using-constraints.pdf|Vivado Design Suite User Guide: Using Constraints]] |
| − | *[[media:s3estarter_ug.pdf|Digilent Spartan 3E Board User's Guide]]
| |
| − | *[[media:Spartan-3e_sch.pdf |Digilent Spartan 3E Board Schematic]]
| |
| | | | |
| | | | |
| − | *[[media:lp3990.pdf|LP3990 1.2V LDO Regulator]] | + | *[[media:Dev_Board_Manual.pdf|Digilent NEXYS 4 DDR Development Board Manual]] |
| − | *[[media:CDBU00340-RevA718649.pdf|0603 SMT Schottky Diode]]
| + | *[[media:Dev_Board_Schematics.pdf|Digilent NEXYS 4 DDR Development Board Schematics]] |
| − | *[[media:AP2141_51.pdf|USB Power Switch in SOT-25-5]]
| |
| − | | |
| − | | |
| − | *[[media:CmodS6_rm_rev_a_v2.pdf|Digilent Cmod S6 Reference Manual]]
| |
| − | *[[media:Cmod_S6_sch.pdf|Digilent Cmod S6 Schematic]] | |
| − | | |
| − | | |
| − | *[[media:Atmel_ATmega16U2.pdf|Atmel ATmega16U2 Microcontroller]]
| |
| − | *[[media:Sn74ls00.pdf|74LS00 Datasheet]]
| |
| − | *[[media:QTH.pdf|SAMTEC Header]]
| |
| − | *[[media:I2C Specification.pdf|I2C Specification]]
| |
