Difference between revisions of "Datasheets"
From CSE260M Wiki
Jump to navigationJump to search| (35 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
| − | *[[media: | + | *[[media:Sn74ls04.pdf|74LS04 Datasheet]] |
| − | *[[media: | + | *[[media:Sn74ls74a.pdf|74LS74 Datasheet]] |
| − | *[[media: | + | *[[media:Am27c256.pdf|AMD 32Kx8 EPROM Datasheet]] |
| + | *[[media:Cy7c199n_8.pdf|Cypress 32Kx8 SRAM]] | ||
| + | *[[media:MT4LC4M16R6.pdf|Micron 4Mx16 EDO DRAM]] | ||
| − | *[[media: | + | *[[media:Ds180_7Series_Overview.pdf|Xilinx 7-Series FPGAs Overview]] |
| − | *[[media: | + | *[[media:Ug474_7Series_CLB.pdf|Xilinx 7-Series CLB User Guide]] |
| − | |||
| − | |||
| − | |||
| − | *[[media: | + | *[[media:Ug903-vivado-using-constraints.pdf|Vivado Design Suite User Guide: Using Constraints]] |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | *[[media: | + | *[[media:Dev_Board_Manual.pdf|Digilent NEXYS 4 DDR Development Board Manual]] |
| − | *[[media: | + | *[[media:Dev_Board_Schematics.pdf|Digilent NEXYS 4 DDR Development Board Schematics]] |
