Difference between revisions of "Lecture Notes"
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*[[media:DISPLACEMENT.pdf|RSRC/SRC Displacement-Based Addressing]] | *[[media:DISPLACEMENT.pdf|RSRC/SRC Displacement-Based Addressing]] | ||
*[[media:SRC_Material.pdf|SRC Documentation]] | *[[media:SRC_Material.pdf|SRC Documentation]] | ||
| − | *[[media:1_BUS_RSRC_BLOCK_DIAGRAM.pdf|1-Bus SRC Block Diagram (From Heuring and Jordan)]] | + | *[[media:1_BUS_RSRC_BLOCK_DIAGRAM.pdf|---1-Bus SRC Block Diagram (From Heuring and Jordan)]] |
| − | *[[media:2_BUS_RSRC_BLOCK_DIAGRAM.pdf|2-Bus SRC Block Diagram (From Heuring and Jordan)]] | + | *[[media:2_BUS_RSRC_BLOCK_DIAGRAM.pdf|---2-Bus SRC Block Diagram (From Heuring and Jordan)]] |
| − | *[[media:3_BUS_RSRC_BLOCK_DIAGRAM.pdf|3-Bus SRC Block Diagram (From Heuring and Jordan)]] | + | *[[media:3_BUS_RSRC_BLOCK_DIAGRAM.pdf|---3-Bus SRC Block Diagram (From Heuring and Jordan)]] |
| − | + | *[[media:3_BUS_RSRC_REGFILE.pdf|------3-Bus SRC Register File (From Heuring and Jordan)]] | |
*[[media:Mano_ch07_images.pdf|Chapter 7]] | *[[media:Mano_ch07_images.pdf|Chapter 7]] | ||
Revision as of 14:12, 18 April 2017
- Course Introduction
- Chapter 1
- -----The Reflected Binary (Gray) Code
- Chapter 2
- Chapter 3
- -----Synthesizable VHDL (2016 Version)
- -----Vivado Simulation Tutorial 1
- -----Vivado Simulation Tutorial 2 (Forcing a Clock)
- -----Full Vivado Tutorial (John MacKay)
- -----Boole's Expansion Theorem
- Chapter 4
- -----NOR SR Latch
- -----First Counter
- -----Second Counter
- -----Oscillators and Clock Distribution
- -----Definitions and Theorems for Sequential Machines
- -----Minimizing Completely Specified Machines
- Chapter 5
- Chapter 6
- Using Babbage's Difference Engine to Introduce Computer Architecture
- The Really Simple RISC Computer (RSRC)
- ---RSRC CONTROL.VHD (Instructor Only)
- ---RSRC ALU.VHD (Instructor Only)
- ---RSRC EPROM.VHD (Instructor Only)
- ---RSRC SRAM.VHD (Instructor Only)
- ---RSRC.VHD (Instructor Only)
- ---RSRC TESTBENCH.VHD (Instructor Only)
- RSRC Abstract RTN
- 1Kx32 RSRC Memory Subsystem
- RSRC/SRC Displacement-Based Addressing
- SRC Documentation
- ---1-Bus SRC Block Diagram (From Heuring and Jordan)
- ---2-Bus SRC Block Diagram (From Heuring and Jordan)
- ---3-Bus SRC Block Diagram (From Heuring and Jordan)
- ------3-Bus SRC Register File (From Heuring and Jordan)
- Chapter 7
- Chapter 8
- Chapter 9
- Chapter 10
- Chapter 11
- Chapter 12
- Anomalous Behavior of Synchronizer and Arbiter Circuits
- Measured Flip-Flop Responses to Marginal Triggering
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