JEE 160 EE/CS 260M

Exam 1

1. Convert (156.40625)10 to binary, octal, and hexadecimal (10 points). 

156/2 = 78 r0        0.40625 * 2 = 0.8125
78/2  = 39 r0        0.8125  * 2 = 1.625
39/2  = 19 r1        0.625   * 2 = 1.25
19/2  =  9 r1        0.25    * 2 = 0.5
9/2   =  4 r1        0.5     * 2 = 1.0
4/2   =  2 r0
2/2   =  1 r0
1/2   =  0 r1

(10011100.01101)2
(234.32)8
(9C.68)16

The circuit shown below is used in problems 2 and 3.

2. Draw the equivalent circuit using NAND gates and inverters as necessary. (10 points)

3. Derive the minimized sum-of-products and product-of-sums equations. (15 points)

4. Design a Binary Coded Decimal (BCD) adder cell using full adders, half adders, and the minimum amount of additional combinational logic. The inputs are two 4-bit BCD numbers and a carry-in. the outputs are a 4-bit BCD number and a carry-out. Use half adders in place of full adders where possible. Show truth tables, K-maps, and minimized sum-of-products or product-of-sums for the additional combinational logic and a circuit diagram of the final design. (hint: the overflow detection is independent of the least significant sum bit.) (25 points)

5. Implement the following Boolean functions with a decoder and OR gates. (10 points)
Z(A,B,C) = PRODUCT M(0,1,2,5,7),
Y(A,B,C) = SUM m(3,4,5,7)

6. Using the Sequential Analysis Procedure, derive the state table and state diagram from the circuit below. (25 points)

7. Design a Moore model circuit (where the output can change only on a positive clock edge) that detects the bit pattern 0011000 (least significant bit first). This pattern can be detected even if it overlaps. Use a D-type flip-flop for the output detection bit (goes 1 when the pattern is detected, 0 otherwise). Use a JK-type flip-flop for the most significant state bit. Use a Toggle-type flip-flop for the next most significant bit and D-type flip-flops for any others. Show a state table, state diagram, and how you simplified the logic to sum-of-products or product-of-sums (Do Not draw a circuit). (25 points)